X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fimx31_litekit.h;h=ec4ed1eeb674191b01effb27aa21c9b98b444e64;hb=1a247ba7fa5fb09f56892a09a990f03ce564b3e2;hp=2a6f59a69826cb66cb492f411281c45cffbfbd62;hpb=caebc95be3b42e5147b5fac7672ac4b2693ef7e1;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/imx31_litekit.h b/include/configs/imx31_litekit.h
index 2a6f59a..ec4ed1e 100644
--- a/include/configs/imx31_litekit.h
+++ b/include/configs/imx31_litekit.h
@@ -4,7 +4,7 @@
  * Richard Woodruff <r-woodruff2@ti.com>
  * Kshitij Gupta <kshitij@ti.com>
  *
- * Configuration settings for the 242x TI H4 board.
+ * Configuration settings for the LogicPD i.MX31 Litekit board.
  *
  * See file CREDITS for list of people who contributed to this
  * project.
@@ -28,6 +28,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#include <asm/arch/mx31-regs.h>
+
  /* High Level Configuration Options */
 #define CONFIG_ARM1136		1    /* This is an arm1136 CPU core */
 #define CONFIG_MX31		1    /* in a mx31 */
@@ -61,6 +63,13 @@
 #define CONFIG_MX31_UART	1
 #define CFG_MX31_UART1		1
 
+#define CONFIG_HARD_SPI		1
+#define CONFIG_MXC_SPI		1
+#define CONFIG_DEFAULT_SPI_BUS	1
+#define CONFIG_DEFAULT_SPI_MODE	(SPI_MODE_2 | SPI_CS_HIGH)
+
+#define CONFIG_RTC_MC13783	1
+
 /* allow to overwrite serial and ethaddr */
 #define CONFIG_ENV_OVERWRITE
 #define CONFIG_CONS_INDEX	1
@@ -75,6 +84,8 @@
 
 #define CONFIG_CMD_MII
 #define CONFIG_CMD_PING
+#define CONFIG_CMD_SPI
+#define CONFIG_CMD_DATE
 
 #define CONFIG_BOOTDELAY	3
 
@@ -91,7 +102,8 @@
 
 
 #define CONFIG_DRIVER_SMC911X		1
-#define CONFIG_DRIVER_SMC911X_BASE	0xb4020000
+#define CONFIG_DRIVER_SMC911X_BASE	(CS4_BASE + 0x00020000)
+#define CONFIG_DRIVER_SMC911X_32_BIT	1
 
 /*
  * Miscellaneous configurable options
@@ -126,18 +138,18 @@
  * Physical Memory Map
  */
 #define CONFIG_NR_DRAM_BANKS	1
-#define PHYS_SDRAM_1		0x80000000
+#define PHYS_SDRAM_1		CSD0_BASE
 #define PHYS_SDRAM_1_SIZE	(128 * 1024 * 1024)
 
 /*-----------------------------------------------------------------------
  * FLASH and environment organization
  */
-#define CFG_FLASH_BASE		0xa0000000
+#define CFG_FLASH_BASE		CS0_BASE
 #define CFG_MAX_FLASH_BANKS	1           /* max number of memory banks */
 #define CFG_MAX_FLASH_SECT	128	     /* max number of sectors on one chip */
 #define CFG_MONITOR_BASE	CFG_FLASH_BASE /* Monitor at beginning of flash */
 
-#define CFG_ENV_ADDR		0xa01f0000
+#define CFG_ENV_ADDR		(CFG_FLASH_BASE + 0x001f0000)
 #define	CFG_ENV_IS_IN_FLASH	1
 #define CFG_ENV_SECT_SIZE	(64 * 1024)
 #define CFG_ENV_SIZE		(64 * 1024)