X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fhmi1001.h;h=354072a8e67957bcd22f0d60480a976e585a4ca2;hb=22a9ea974bdf18e6adad5c4f80b1c60ef384690c;hp=f9cdcbc3ce0c3a5e3e36963bfe62373514ae8355;hpb=0020db3f0da61f3e2c8a459a87598e07594dc8ac;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/hmi1001.h b/include/configs/hmi1001.h
index f9cdcbc..354072a 100644
--- a/include/configs/hmi1001.h
+++ b/include/configs/hmi1001.h
@@ -33,10 +33,11 @@
 #define CONFIG_MPC5200		1	/* (more precisely an MPC5200 CPU)	*/
 #define CONFIG_HMI1001		1	/* HMI1001 board			*/
 
-#define CONFIG_SYS_MPC5XXX_CLKIN	33000000 /* ... running at 33.000000MHz		*/
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE	0xFFF00000
+#endif
 
-#define BOOTFLAG_COLD		0x01	/* Normal Power-On: Boot from FLASH	*/
-#define BOOTFLAG_WARM		0x02	/* Software reboot			*/
+#define CONFIG_SYS_MPC5XXX_CLKIN	33000000 /* ... running at 33.000000MHz		*/
 
 #define CONFIG_BOARD_EARLY_INIT_R
 
@@ -80,7 +81,7 @@
 
 #define	CONFIG_TIMESTAMP	1	/* Print image info with timestamp */
 
-#if (TEXT_BASE == 0xFFF00000) /* Boot low */
+#if (CONFIG_SYS_TEXT_BASE == 0xFFF00000) /* Boot low */
 #   define CONFIG_SYS_LOWBOOT		1
 #endif
 
@@ -149,7 +150,7 @@
 #define CONFIG_SYS_FLASH_SIZE		0x00800000 /* 8 MByte */
 #define CONFIG_SYS_MAX_FLASH_SECT	67	/* max num of sects on one chip */
 
-#define CONFIG_ENV_ADDR		(TEXT_BASE+0x40000) /* second sector */
+#define CONFIG_ENV_ADDR		(CONFIG_SYS_TEXT_BASE+0x40000) /* second sector */
 #define CONFIG_SYS_MAX_FLASH_BANKS	1	/* max num of flash banks
 					   (= chip selects) */
 #define CONFIG_SYS_FLASH_ERASE_TOUT	240000	/* Flash Erase Timeout (in ms)	*/
@@ -190,19 +191,20 @@
 
 /* Use ON-Chip SRAM until RAM will be available */
 #define CONFIG_SYS_INIT_RAM_ADDR	MPC5XXX_SRAM
-#ifdef CONFIG_POST
+
 /* preserve space for the post_word at end of on-chip SRAM */
-#define CONFIG_SYS_INIT_RAM_END	MPC5XXX_SRAM_POST_SIZE
+#define MPC5XXX_SRAM_POST_SIZE (MPC5XXX_SRAM_SIZE - 4)
+
+#ifdef CONFIG_POST
+#define CONFIG_SYS_INIT_RAM_SIZE	MPC5XXX_SRAM_POST_SIZE
 #else
-#define CONFIG_SYS_INIT_RAM_END	MPC5XXX_SRAM_SIZE
+#define CONFIG_SYS_INIT_RAM_SIZE	MPC5XXX_SRAM_SIZE
 #endif
 
-
-#define CONFIG_SYS_GBL_DATA_SIZE	128	/* size in bytes reserved for initial data */
-#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
 
-#define CONFIG_SYS_MONITOR_BASE    TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE    CONFIG_SYS_TEXT_BASE
 #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
 #   define CONFIG_SYS_RAMBOOT		1
 #endif
@@ -350,6 +352,7 @@
 /* Display addresses						       */
 /*---------------------------------------------------------------------*/
 
+#define CONFIG_PDSP188x
 #define CONFIG_SYS_DISP_CHR_RAM	(CONFIG_SYS_DISPLAY_BASE + 0x38)
 #define CONFIG_SYS_DISP_CWORD		(CONFIG_SYS_DISPLAY_BASE + 0x30)