X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fhermes.h;h=e1a0846d48ccdc1907cc07e0a951a79f51c535d3;hb=0e8d158664a913392cb01fb11a948d83f72e105e;hp=e3a2ed28034353c4836bd5664452822f0724929e;hpb=2fd90ce575b02d189cbf443c85309bcd001aa393;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/hermes.h b/include/configs/hermes.h
index e3a2ed2..e1a0846 100644
--- a/include/configs/hermes.h
+++ b/include/configs/hermes.h
@@ -54,9 +54,9 @@
 
 #undef	CONFIG_BOOTARGS
 #define CONFIG_BOOTCOMMAND							\
-	"bootp; " 								\
-	"setenv bootargs root=/dev/nfs rw nfsroot=${serverip}:${rootpath} " 	\
-	"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off; " 	\
+	"bootp; "								\
+	"setenv bootargs root=/dev/nfs rw nfsroot=${serverip}:${rootpath} "	\
+	"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off; "	\
 	"bootm"
 
 #define CONFIG_LOADS_ECHO	1	/* echo on for serial download	*/
@@ -105,7 +105,7 @@
 
 #define CFG_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }
 
-#define	CFG_ALLOC_DPRAM		1	/* use allocation routines 	*/
+#define	CFG_ALLOC_DPRAM		1	/* use allocation routines	*/
 /*
  * Low Level Configuration Settings
  * (address mappings, register initial values, etc.)
@@ -155,9 +155,9 @@
 #define CFG_FLASH_ERASE_TOUT	120000	/* Timeout for Flash Erase (in ms)	*/
 #define CFG_FLASH_WRITE_TOUT	500	/* Timeout for Flash Write (in ms)	*/
 
-#define	CFG_ENV_IS_IN_FLASH	1
-#define	CFG_ENV_OFFSET		0x4000	/*   Offset   of Environment Sector	*/
-#define	CFG_ENV_SIZE		0x2000	/* Total Size of Environment Sector	*/
+#define	CONFIG_ENV_IS_IN_FLASH	1
+#define	CONFIG_ENV_OFFSET		0x4000	/*   Offset   of Environment Sector	*/
+#define	CONFIG_ENV_SIZE		0x2000	/* Total Size of Environment Sector	*/
 /*-----------------------------------------------------------------------
  * Cache Configuration
  */
@@ -227,7 +227,7 @@
 /* +0x0282 => 0x03800000 */
 #define CFG_SCCR	(SCCR_COM00	|   SCCR_TBS	  |	\
 			 SCCR_RTDIV	|   SCCR_RTSEL	  |	\
-			 /*SCCR_CRQEN|*/  /*SCCR_PRQEN|*/ 	\
+			 /*SCCR_CRQEN|*/  /*SCCR_PRQEN|*/	\
 			 SCCR_EBDF00	|   SCCR_DFSYNC00 |	\
 			 SCCR_DFBRG00	|   SCCR_DFNL000  |	\
 			 SCCR_DFNH000)