X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fhcu5.h;h=0796a7d52676693d6fa19b4c7fc2cd554defc90c;hb=9314cee6917444ab88bd4e758da7a30975120187;hp=8c26613d0c0d81a9ea11ecbdfe7491e478b917d4;hpb=ef5b4f221c22d05770878513951745f236b5b43f;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/hcu5.h b/include/configs/hcu5.h
index 8c26613..0796a7d 100644
--- a/include/configs/hcu5.h
+++ b/include/configs/hcu5.h
@@ -106,14 +106,14 @@
  * Environment
  *----------------------------------------------------------------------*/
 
-#undef	CFG_ENV_IS_IN_NVRAM
+#undef	CONFIG_ENV_IS_IN_NVRAM
 #define  CFG_ENV_IS_IN_FLASH
-#undef	CFG_ENV_IS_IN_EEPROM
+#undef	CONFIG_ENV_IS_IN_EEPROM
 #undef  CFG_ENV_IS_NOWHERE
 
-#ifdef  CFG_ENV_IS_IN_EEPROM
+#ifdef  CONFIG_ENV_IS_IN_EEPROM
 /* Put the environment after the SDRAM and bootstrap configuration */
-#define PROM_SIZE 	2048
+#define PROM_SIZE	2048
 #define CFG_BOOSTRAP_OPTION_OFFSET	 512
 #define CFG_ENV_OFFSET	 (CFG_BOOSTRAP_OPTION_OFFSET + 0x10)
 #define CFG_ENV_SIZE	(PROM_SIZE-CFG_ENV_OFFSET)
@@ -134,7 +134,7 @@
 /*-----------------------------------------------------------------------
  * DDR SDRAM
  *----------------------------------------------------------------------*/
-#define CFG_MBYTES_SDRAM        (128)		/* 128 MB or 256 MB  	*/
+#define CFG_MBYTES_SDRAM        (128)		/* 128 MB or 256 MB	*/
 #define CFG_DDR_CACHED_ADDR	0x50000000	/* setup 2nd TLB cached here */
 #undef  CONFIG_DDR_DATA_EYE		/* Do not use DDR2 optimization	*/
 #define CONFIG_DDR_ECC		1	/* enable ECC			*/
@@ -176,13 +176,13 @@
 /* Setup some board specific values for the default environment variables */
 #define CONFIG_HOSTNAME		hcu5
 #define CONFIG_IPADDR		172.25.1.99
-#define CONFIG_ETHADDR      	00:60:13:00:00:00 /* Netstal Machines AG MAC */
+#define CONFIG_ETHADDR	00:60:13:00:00:00 /* Netstal Machines AG MAC */
 #define CONFIG_OVERWRITE_ETHADDR_ONCE
 #define CONFIG_SERVERIP		172.25.1.3
 
 #define CFG_TFTP_LOADADDR 0x01000000 /* @16 MB */
 
-#define	CONFIG_EXTRA_ENV_SETTINGS				\
+#define	CONFIG_EXTRA_ENV_SETTINGS					\
 	"netdev=eth0\0"							\
 	"loadaddr=0x01000000\0"						\
 	"nfsargs=setenv bootargs root=/dev/nfs rw "			\
@@ -192,21 +192,21 @@
 		"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"	\
 		":${hostname}:${netdev}:off panic=1\0"			\
 	"addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0"\
-	"nfs=tftp 200000 ${bootfile};run nfsargs addip addtty;" 	\
+	"nfs=tftp 200000 ${bootfile};run nfsargs addip addtty;"		\
 		"bootm\0"						\
-		"bootfile=hcu5/uImage\0" 				\
-		"rootpath=/home/hcu/eldk/ppc_4xxFP\0"		 	\
-		"load=tftp 100000 hcu5/u-boot.bin\0"		 	\
+		"bootfile=hcu5/uImage\0"				\
+		"rootpath=/home/hcu/eldk/ppc_4xxFP\0"			\
+		"load=tftp 100000 hcu5/u-boot.bin\0"			\
 	"update=protect off FFFB0000 FFFFFFFF;era FFFB0000 FFFFFFFF;"	\
 		"cp.b 100000 FFFB0000 50000\0"			        \
-	"upd=run load;run update\0"					\
+	"upd=run load update\0"						\
 	"vx_rom=hcu5/hcu5_vx_rom\0"					\
 	"vx=tftp ${loadaddr} ${vx_rom};run vxargs; bootvx\0"		\
 	"vxargs=setenv bootargs emac(0,0)c:${vx_rom} e=${ipaddr}"	\
 	" h=${serverip} u=dpu pw=netstal8752 tn=hcu5 f=0x3008\0"	\
-	"usbargs=setenv bootargs root=/dev/sda1 ro\0"     	     	\
+	"usbargs=setenv bootargs root=/dev/sda1 ro\0"			\
 	"linux=usb start; ext2load usb 0 ${loadaddr} /boot/uImage;"     \
-	"run usbargs addip addtty; bootm\0"     			\
+	"run usbargs addip addtty; bootm\0"				\
 	"net_nfs_fdt=tftp 200000 ${bootfile};"				\
 		"tftp ${fdt_addr} ${fdt_file};"				\
 		"run nfsargs addip addtty;"				\
@@ -349,12 +349,20 @@
  * Flash
  *----------------------------------------------------------------------*/
 
+/* Use common CFI driver */
+#define CFG_FLASH_CFI
+#define CONFIG_FLASH_CFI_DRIVER
+/* board provides its own flash_init code */
+#define CONFIG_FLASH_CFI_LEGACY		1
+#define CFG_FLASH_CFI_WIDTH		FLASH_CFI_8BIT
+#define CFG_FLASH_LEGACY_512Kx8 1
+
+/* print 'E' for empty sector on flinfo */
+#define CFG_FLASH_EMPTY_INFO
+
 #define CFG_MAX_FLASH_BANKS	1	/* max number of memory banks */
 #define CFG_MAX_FLASH_SECT	8	/* max number of sectors on one chip */
 
-#define CFG_FLASH_ERASE_TOUT	120000	/* Timeout for Flash Erase (in ms) */
-#define CFG_FLASH_WRITE_TOUT	500	/* Timeout for Flash Write (in ms) */
-
 /*-----------------------------------------------------------------------
  * External Bus Controller (EBC) Setup
  *----------------------------------------------------------------------*/