X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fgdppc440etx.h;h=3c59ff4922c86948373869f045146ce259f5a607;hb=10d1a160f5e28b05f891c050ca2f23855b226f5f;hp=d193919dc5a0a3c0d7cbf3d06c959a5d0e2a2b85;hpb=c1b7c70083fc8d0bb77db20dd47bb6c988f3dc67;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/gdppc440etx.h b/include/configs/gdppc440etx.h
index d193919d..3c59ff4 100644
--- a/include/configs/gdppc440etx.h
+++ b/include/configs/gdppc440etx.h
@@ -40,6 +40,8 @@
 #define CONFIG_4xx		1		/* ... PPC4xx family         */
 #define CONFIG_SYS_CLK_FREQ	66666666	/* external freq to pll      */
 
+#define	CONFIG_SYS_TEXT_BASE	0xFFF80000
+
 /*
  * Include common defines/options for all AMCC eval boards
  */
@@ -59,7 +61,6 @@
 #define CONFIG_SYS_PCI_MEMBASE3		CONFIG_SYS_PCI_MEMBASE2 + 0x10000000
 
 /*Don't change either of these*/
-#define CONFIG_SYS_PERIPHERAL_BASE	0xef600000	/* internal peripheral*/
 #define CONFIG_SYS_PCI_BASE		0xe0000000	/* internal PCI regs */
 /*Don't change either of these*/
 
@@ -71,17 +72,20 @@
  */
 #define CONFIG_SYS_INIT_RAM_DCACHE	1		/* d-cache as init ram*/
 #define CONFIG_SYS_INIT_RAM_ADDR	0x70000000	/* DCache             */
-#define CONFIG_SYS_INIT_RAM_END		(4 << 10)
-#define CONFIG_SYS_GBL_DATA_SIZE	256		/* num bytes init data*/
-#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_END \
-					 - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_RAM_SIZE		(4 << 10)
+#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE \
+					 - GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
 
 /*
  * Serial Port
  */
+#define CONFIG_CONS_INDEX	2	/* Use UART1			*/
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	1
+#define CONFIG_SYS_NS16550_CLK		get_serial_clock()
 #define CONFIG_SYS_EXT_SERIAL_CLOCK	11059200	/* ext. 11.059MHz clk */
-#define CONFIG_UART1_CONSOLE
 
 /*
  * Environment