X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fgcplus.h;h=85db4f5c773bee8750be018b4f9afe3e38531d49;hb=206c00f26f56af02686cb69bfe5c75e979063171;hp=e11ce4c715e6690926626d037f1668fb9d4166ed;hpb=375c2c9e57ea5b8d678475379378f4774aa9cb88;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/gcplus.h b/include/configs/gcplus.h index e11ce4c..85db4f5 100644 --- a/include/configs/gcplus.h +++ b/include/configs/gcplus.h @@ -29,8 +29,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#undef DEBUG - /* * The ADS GCPlus Linux boot ROM loads U-Boot into RAM at 0xc0200000. * We don't actually init RAM in this case since we're using U-Boot as @@ -38,7 +36,7 @@ * e.g. bootp/tftp download of the kernel is a far more convenient * when testing new kernels on this target. However the ADS GCPlus Linux * boot ROM leaves the MMU enabled when it passes control to U-Boot. So - * we use lowlevel_init (CONFIG_INIT_CRITICAL) to remedy that problem. + * we use lowlevel_init (!CONFIG_SKIP_LOWLEVEL_INIT) to remedy that problem. */ #undef CONFIG_SKIP_LOWLEVEL_INIT #define CONFIG_SKIP_RELOCATE_UBOOT 1 @@ -51,6 +49,8 @@ #define CONFIG_GCPLUS 1 /* on an ADS GCPlus Board */ #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ +/* we will never enable dcache, because we have to setup MMU first */ +#define CONFIG_SYS_NO_DCACHE #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ #define CONFIG_SETUP_MEMORY_TAGS 1 @@ -59,8 +59,8 @@ /* * Size of malloc() pool */ -#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024) -#define CFG_GBL_DATA_SIZE 128 /* size rsrvd for initial data */ +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) +#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size rsrvd for initial data */ /* @@ -72,6 +72,7 @@ /* * select serial console configuration */ +#define CONFIG_SA1100_SERIAL #define CONFIG_SERIAL3 1 /* we use SERIAL 3 on ADS GCPlus */ /* allow to overwrite serial and ethaddr */ @@ -100,7 +101,7 @@ #define CONFIG_BOOTDELAY 3 #define CONFIG_BOOTARGS "console=ttySA0,38400n8 mtdparts=sa1100-flash:1m@0(zImage),3m@1m(ramdisk.gz),12m@4m(userfs) root=/dev/nfs ip=bootp" #define CONFIG_BOOTCOMMAND "bootp;tftp;bootm" -#define CFG_AUTOLOAD "n" /* No autoload */ +#define CONFIG_SYS_AUTOLOAD "n" /* No autoload */ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 38400 /* speed to run kgdb serial port */ @@ -110,25 +111,23 @@ /* * Miscellaneous configurable options */ -#define CFG_LONGHELP /* undef to save memory */ -#define CFG_PROMPT "ADS GCPlus # " /* Monitor Command Prompt */ -#define CFG_CBSIZE 256 /* Console I/O Buffer Size */ -#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ -#define CFG_MAXARGS 16 /* max number of command args */ -#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ - -#define CFG_MEMTEST_START 0xc0400000 /* memtest works on */ -#define CFG_MEMTEST_END 0xc0800000 /* 4 ... 8 MB in DRAM */ +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_SYS_PROMPT "ADS GCPlus # " /* Monitor Command Prompt */ +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ -#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */ +#define CONFIG_SYS_MEMTEST_START 0xc0400000 /* memtest works on */ +#define CONFIG_SYS_MEMTEST_END 0xc0800000 /* 4 ... 8 MB in DRAM */ -#define CFG_LOAD_ADDR 0xc0000000 /* default load address */ +#define CONFIG_SYS_LOAD_ADDR 0xc0000000 /* default load address */ -#define CFG_HZ 3686400 /* incrementer freq: 3.6864 MHz */ -#define CFG_CPUSPEED 0x0a /* set core clock to 206MHz */ +#define CONFIG_SYS_HZ 3686400 /* incrementer freq: 3.6864 MHz */ +#define CONFIG_SYS_CPUSPEED 0x0a /* set core clock to 206MHz */ /* valid baudrates */ -#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } /*----------------------------------------------------------------------- * Stack sizes @@ -156,32 +155,32 @@ #define PHYS_FLASH_BANK_SIZE 0x01000000 /* 16 MB Banks */ #define PHYS_FLASH_SECT_SIZE 0x00040000 /* 256 KB sectors (x2) */ -#define CFG_FLASH_BASE PHYS_FLASH_1 +#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 /*----------------------------------------------------------------------- * FLASH and environment organization */ #if 1 -#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ -#define CFG_MAX_FLASH_SECT 128 /* max number of sectors on one chip */ +#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ +#define CONFIG_SYS_MAX_FLASH_SECT 128 /* max number of sectors on one chip */ /* timeout values are in ticks */ -#define CFG_FLASH_ERASE_TOUT (2*CFG_HZ) /* Timeout for Flash Erase */ -#define CFG_FLASH_WRITE_TOUT (2*CFG_HZ) /* Timeout for Flash Write */ +#define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Erase */ +#define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Write */ #else /* REVISIT: This doesn't work on ADS GCPlus just yet: */ -#define CFG_FLASH_CFI 1 /* flash is CFI conformant */ -#define CFG_FLASH_CFI_DRIVER 1 /* use common cfi driver */ -#define CFG_FLASH_USE_BUFFER_WRITE 1 /* use buffered writes (20x faster) */ -#define CFG_MAX_FLASH_BANKS 1 /* max # of memory banks */ -#define CFG_FLASH_INCREMENT 0 /* there is only one bank */ -#define CFG_MAX_FLASH_SECT 128 /* max # of sectors on one chip */ -/*#define CFG_FLASH_PROTECTION 1 /--* hardware flash protection */ -#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE } +#define CONFIG_SYS_FLASH_CFI 1 /* flash is CFI conformant */ +#define CONFIG_FLASH_CFI_DRIVER 1 /* use common cfi driver */ +#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* use buffered writes (20x faster) */ +#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max # of memory banks */ +#define CONFIG_SYS_FLASH_INCREMENT 0 /* there is only one bank */ +#define CONFIG_SYS_MAX_FLASH_SECT 128 /* max # of sectors on one chip */ +/*#define CONFIG_SYS_FLASH_PROTECTION 1 /--* hardware flash protection */ +#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } #endif -#define CFG_ENV_IS_IN_FLASH 1 -#define CFG_ENV_ADDR (PHYS_FLASH_1 + PHYS_FLASH_SECT_SIZE) /* Addr of Environment Sector */ -#define CFG_ENV_SIZE PHYS_FLASH_SECT_SIZE +#define CONFIG_ENV_IS_IN_FLASH 1 +#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + PHYS_FLASH_SECT_SIZE) /* Addr of Environment Sector */ +#define CONFIG_ENV_SIZE PHYS_FLASH_SECT_SIZE #endif /* __CONFIG_H */