X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fexynos5-common.h;h=ec09f6cc5de6364f83aceb1812ceab5170fe5bbb;hb=4db386655a889b6466d2c3f40839ad21205c6d21;hp=44f5cb1e83f450b6aa9c93cce8242e098d321326;hpb=c5e7003aa86e1bfc7371d41509e8d34cafdfeb6c;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/exynos5-common.h b/include/configs/exynos5-common.h
index 44f5cb1..ec09f6c 100644
--- a/include/configs/exynos5-common.h
+++ b/include/configs/exynos5-common.h
@@ -27,30 +27,28 @@
 /* MMC SPL */
 #define COPY_BL2_FNPTR_ADDR	0x02020030
 
-#define CONFIG_RD_LVL
-
-#define PHYS_SDRAM_1		CONFIG_SYS_SDRAM_BASE
+#define PHYS_SDRAM_1		CFG_SYS_SDRAM_BASE
 #define PHYS_SDRAM_1_SIZE	SDRAM_BANK_SIZE
-#define PHYS_SDRAM_2		(CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE)
+#define PHYS_SDRAM_2		(CFG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE)
 #define PHYS_SDRAM_2_SIZE	SDRAM_BANK_SIZE
-#define PHYS_SDRAM_3		(CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE))
+#define PHYS_SDRAM_3		(CFG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE))
 #define PHYS_SDRAM_3_SIZE	SDRAM_BANK_SIZE
-#define PHYS_SDRAM_4		(CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE))
+#define PHYS_SDRAM_4		(CFG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE))
 #define PHYS_SDRAM_4_SIZE	SDRAM_BANK_SIZE
-#define PHYS_SDRAM_5		(CONFIG_SYS_SDRAM_BASE + (4 * SDRAM_BANK_SIZE))
+#define PHYS_SDRAM_5		(CFG_SYS_SDRAM_BASE + (4 * SDRAM_BANK_SIZE))
 #define PHYS_SDRAM_5_SIZE	SDRAM_BANK_SIZE
-#define PHYS_SDRAM_6		(CONFIG_SYS_SDRAM_BASE + (5 * SDRAM_BANK_SIZE))
+#define PHYS_SDRAM_6		(CFG_SYS_SDRAM_BASE + (5 * SDRAM_BANK_SIZE))
 #define PHYS_SDRAM_6_SIZE	SDRAM_BANK_SIZE
-#define PHYS_SDRAM_7		(CONFIG_SYS_SDRAM_BASE + (6 * SDRAM_BANK_SIZE))
+#define PHYS_SDRAM_7		(CFG_SYS_SDRAM_BASE + (6 * SDRAM_BANK_SIZE))
 #define PHYS_SDRAM_7_SIZE	SDRAM_BANK_SIZE
-#define PHYS_SDRAM_8		(CONFIG_SYS_SDRAM_BASE + (7 * SDRAM_BANK_SIZE))
+#define PHYS_SDRAM_8		(CFG_SYS_SDRAM_BASE + (7 * SDRAM_BANK_SIZE))
 #define PHYS_SDRAM_8_SIZE	SDRAM_BANK_SIZE
 
 /* SPI */
 
 /* Ethernet Controllor Driver */
 #ifdef CONFIG_CMD_NET
-#define CONFIG_ENV_SROM_BANK		1
+#define CFG_ENV_SROM_BANK		1
 #endif /*CONFIG_CMD_NET*/
 
 /* Enable Time Command */
@@ -58,7 +56,6 @@
 /* USB */
 
 /* USB boot mode */
-#define CONFIG_USB_BOOTING
 #define EXYNOS_COPY_USB_FNPTR_ADDR	0x02020070
 #define EXYNOS_USB_SECONDARY_BOOT	0xfeed0002
 #define EXYNOS_IRAM_SECONDARY_BASE	0x02020018
@@ -94,7 +91,7 @@
 #define EXYNOS_FDTFILE_SETTING
 #endif
 
-#define CONFIG_EXTRA_ENV_SETTINGS \
+#define CFG_EXTRA_ENV_SETTINGS \
 	EXYNOS_DEVICE_SETTINGS \
 	EXYNOS_FDTFILE_SETTING \
 	MEM_LAYOUT_ENV_SETTINGS \