X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fexynos5-common.h;h=cd2a9046afec3b44fd0865de16040a4dddb20d5e;hb=29d280c88a1ff331dce2d4c7a5aaf2402aa0fd8a;hp=4866836d55261ce2405c256bdf6a993c56115411;hpb=b7e84c93c450480ca4ff51ad2eb56bd83c1dc368;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/exynos5-common.h b/include/configs/exynos5-common.h index 4866836..cd2a904 100644 --- a/include/configs/exynos5-common.h +++ b/include/configs/exynos5-common.h @@ -1,9 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright (C) 2013 Samsung Electronics * * Configuration settings for the SAMSUNG EXYNOS5 board. - * - * SPDX-License-Identifier: GPL-2.0+ */ #ifndef __CONFIG_EXYNOS5_COMMON_H @@ -13,12 +12,10 @@ #include "exynos-common.h" -#define CONFIG_SYS_CACHELINE_SIZE 64 #define CONFIG_EXYNOS_SPL #ifdef FTRACE #define CONFIG_TRACE -#define CONFIG_CMD_TRACE #define CONFIG_TRACE_BUFFER_SIZE (16 << 20) #define CONFIG_TRACE_EARLY_SIZE (8 << 20) #define CONFIG_TRACE_EARLY @@ -27,7 +24,6 @@ /* Enable ACE acceleration for SHA1 and SHA256 */ #define CONFIG_EXYNOS_ACE_SHA -#define CONFIG_SHA_HW_ACCEL /* Power Down Modes */ #define S5P_CHECK_SLEEP 0x00000BAD @@ -41,30 +37,16 @@ #define INFORM3_OFFSET 0x80c /* select serial console configuration */ -#define CONFIG_BAUDRATE 115200 #define EXYNOS5_DEFAULT_UART_OFFSET 0x010000 -#define CONFIG_SILENT_CONSOLE -#define CONFIG_SYS_CONSOLE_IS_IN_ENV -#define CONFIG_CONSOLE_MUX - -#define CONFIG_CMD_HASH /* Thermal Management Unit */ #define CONFIG_EXYNOS_TMU -#define CONFIG_CMD_DTT -#define CONFIG_TMU_CMD_DTT /* MMC SPL */ #define COPY_BL2_FNPTR_ADDR 0x02020030 #define CONFIG_SUPPORT_EMMC_BOOT -#define CONFIG_SPL_LIBCOMMON_SUPPORT -#define CONFIG_SPL_GPIO_SUPPORT -#define CONFIG_SPL_SERIAL_SUPPORT -#define CONFIG_SPL_LIBGENERIC_SUPPORT - /* specific .lds file */ -#define CONFIG_SPL_LDSCRIPT "board/samsung/common/exynos-uboot-spl.lds" /* Boot Argument Buffer Size */ /* memtest works on */ @@ -113,7 +95,7 @@ #define CONFIG_BL1_OFFSET (CONFIG_RES_BLOCK_SIZE + CONFIG_SEC_FW_SIZE) #define CONFIG_BL2_OFFSET (CONFIG_BL1_OFFSET + CONFIG_BL1_SIZE) -/* U-boot copy size from boot Media to DRAM.*/ +/* U-Boot copy size from boot Media to DRAM.*/ #define BL2_START_OFFSET (CONFIG_BL2_OFFSET/512) #define BL2_SIZE_BLOC_COUNT (CONFIG_BL2_SIZE/512) @@ -121,19 +103,12 @@ #define SPI_FLASH_UBOOT_POS (CONFIG_SEC_FW_SIZE + CONFIG_BL1_SIZE) /* I2C */ -#define CONFIG_CMD_I2C #define CONFIG_SYS_I2C_S3C24X0 #define CONFIG_SYS_I2C_S3C24X0_SPEED 100000 /* 100 Kbps */ #define CONFIG_SYS_I2C_S3C24X0_SLAVE 0x0 -#define CONFIG_I2C_EDID /* SPI */ #ifdef CONFIG_SPI_FLASH -#define CONFIG_EXYNOS_SPI -#define CONFIG_CMD_SF -#define CONFIG_CMD_SPI -#define CONFIG_SPI_FLASH_WINBOND -#define CONFIG_SPI_FLASH_GIGADEVICE #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 #define CONFIG_SF_DEFAULT_SPEED 50000000 #endif @@ -147,33 +122,12 @@ /* Ethernet Controllor Driver */ #ifdef CONFIG_CMD_NET -#define CONFIG_SMC911X -#define CONFIG_SMC911X_BASE 0x5000000 -#define CONFIG_SMC911X_16_BIT #define CONFIG_ENV_SROM_BANK 1 #endif /*CONFIG_CMD_NET*/ -/* SHA hashing */ -#define CONFIG_CMD_HASH -#define CONFIG_HASH_VERIFY -#define CONFIG_SHA1 -#define CONFIG_SHA256 - /* Enable Time Command */ -#define CONFIG_CMD_TIME - -#define CONFIG_CMD_GPIO /* USB */ -#define CONFIG_CMD_USB -#define CONFIG_USB_STORAGE -#define CONFIG_USB_XHCI_DWC3 -#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3 -#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 - -#define CONFIG_USB_HOST_ETHER -#define CONFIG_USB_ETHER_ASIX -#define CONFIG_USB_ETHER_SMSC95XX /* USB boot mode */ #define CONFIG_USB_BOOTING @@ -181,13 +135,10 @@ #define EXYNOS_USB_SECONDARY_BOOT 0xfeed0002 #define EXYNOS_IRAM_SECONDARY_BASE 0x02020018 -/* Enable FIT support and comparison */ -#define CONFIG_FIT -#define CONFIG_FIT_BEST_MATCH - #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 1) \ func(MMC, mmc, 0) \ + func(MMC, mmc, 2) \ func(PXE, pxe, na) \ func(DHCP, dhcp, na)