X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fep8260.h;h=aba3392234d3123c982dd4368d7e5806bbbaca74;hb=c2120fbfbc4d1f6953228f86be8bdbf38bacfdab;hp=d49d02f2872311ed05b9dfa532a717208292645a;hpb=f82642e33899766892499b163e60560fbbf87773;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/ep8260.h b/include/configs/ep8260.h index d49d02f..aba3392 100644 --- a/include/configs/ep8260.h +++ b/include/configs/ep8260.h @@ -5,23 +5,7 @@ * This file is based on similar values for other boards found in other * U-Boot config files, and some that I found in the EP8260 manual. * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA + * SPDX-License-Identifier: GPL-2.0+ */ /* @@ -48,6 +32,8 @@ #define CONFIG_SYS_EP8260_H2 1 /* #undef CONFIG_SYS_EP8260_H2 */ +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 + #define CONFIG_CPM2 1 /* Has a CPM2 */ /* What is the oscillator's (UX2) frequency in Hz? */ @@ -97,7 +83,7 @@ #define CONFIG_SYS_RESET_ADDRESS 0xFFF00100 /* What should the base address of the main FLASH be and how big is - * it (in MBytes)? This must contain TEXT_BASE from board/ep8260/config.mk + * it (in MBytes)? This must contain CONFIG_SYS_TEXT_BASE from board/ep8260/config.mk * The main FLASH is whichever is connected to *CS0. U-Boot expects * this to be the SIMM. */ @@ -198,8 +184,8 @@ * - RAM for BD/Buffers is on the local Bus (see 28-13) * - Enable Half Duplex in FSMR */ -# define CONFIG_SYS_CMXFCR_MASK (CMXFCR_FC3|CMXFCR_RF3CS_MSK|CMXFCR_TF3CS_MSK) -# define CONFIG_SYS_CMXFCR_VALUE (CMXFCR_RF3CS_CLK15|CMXFCR_TF3CS_CLK16) +# define CONFIG_SYS_CMXFCR_MASK3 (CMXFCR_FC3|CMXFCR_RF3CS_MSK|CMXFCR_TF3CS_MSK) +# define CONFIG_SYS_CMXFCR_VALUE3 (CMXFCR_RF3CS_CLK15|CMXFCR_TF3CS_CLK16) /* * - RAM for BD/Buffers is on the local Bus (see 28-13) @@ -225,15 +211,18 @@ * If the software driver is chosen, there are some additional * configuration items that the driver uses to drive the port pins. */ -#undef CONFIG_HARD_I2C /* I2C with hardware support */ -#define CONFIG_SOFT_I2C 1 /* I2C bit-banged */ +#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ + #define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F +#define CONFIG_SYS_I2C_SLAVE 0x7F /* This is for HARD, must go */ /* * Software (bit-bang) I2C driver configuration */ -#ifdef CONFIG_SOFT_I2C +#ifdef CONFIG_SYS_I2C_SOFT +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_SOFT_SPEED 50000 +#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE #define I2C_PORT 3 /* Port A=0, B=1, C=2, D=3 */ #define I2C_ACTIVE (iop->pdir |= 0x00010000) #define I2C_TRISTATE (iop->pdir &= ~0x00010000) @@ -243,7 +232,7 @@ #define I2C_SCL(bit) if(bit) iop->pdat |= 0x00020000; \ else iop->pdat &= ~0x00020000 #define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */ -#endif /* CONFIG_SOFT_I2C */ +#endif /* CONFIG_SYS_I2C_SOFT */ /* #define CONFIG_RTC_DS174x */ @@ -288,7 +277,6 @@ with a somewhat smapper memory footprint. */ #define CONFIG_SYS_HUSH_PARSER -#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " /* @@ -323,7 +311,6 @@ #define CONFIG_CMD_SDRAM #define CONFIG_CMD_SNTP -#undef CONFIG_CMD_DCR #undef CONFIG_CMD_XIMG /* Where do the internal registers live? */ @@ -371,13 +358,9 @@ #define CONFIG_CLOCKS_IN_MHZ 1 /* clocks passsed to Linux in MHz */ #define CONFIG_SYS_LOAD_ADDR 0x00100000 /* default load address */ -#define CONFIG_SYS_TFTP_LOADADDR 0x00100000 /* default load address for network file downloads */ #define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */ -/* valid baudrates */ -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } - /* * Low Level Configuration Settings * (address mappings, register initial values, etc.) @@ -427,9 +410,8 @@ * Definitions for initial stack pointer and data area (in DPRAM) */ #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_IMMR -#define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in DPRAM */ -#define CONFIG_SYS_GBL_DATA_SIZE 128 /* bytes reserved for initial data */ -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_RAM_SIZE 0x4000 /* Size of used area in DPRAM */ +#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET /*----------------------------------------------------------------------- @@ -438,7 +420,7 @@ * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 * Note also that the logic that sets CONFIG_SYS_RAMBOOT is platform dependent. */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) @@ -746,19 +728,11 @@ #endif /* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - -/* * JFFS2 partitions * */ /* No command line, one static partition, whole device */ -#undef CONFIG_JFFS2_CMDLINE +#undef CONFIG_CMD_MTDPARTS #define CONFIG_JFFS2_DEV "nor0" #define CONFIG_JFFS2_PART_SIZE 0xFFFFFFFF #define CONFIG_JFFS2_PART_OFFSET 0x00000000 @@ -766,7 +740,7 @@ /* mtdparts command line support */ /* Note: fake mtd_id used, no linux mtd map file */ /* -#define CONFIG_JFFS2_CMDLINE +#define CONFIG_CMD_MTDPARTS #define MTDIDS_DEFAULT "" #define MTDPARTS_DEFAULT "" */