X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fep8260.h;h=9a602c3afb91642f96db9303451f6fceb99cf764;hb=0e8d158664a913392cb01fb11a948d83f72e105e;hp=fb335db804938e158062fb1f607dabfaac3dfcec;hpb=a562e1bd9d8e10ea2e51d08e66d35a6e1795153b;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/ep8260.h b/include/configs/ep8260.h index fb335db..9a602c3 100644 --- a/include/configs/ep8260.h +++ b/include/configs/ep8260.h @@ -28,17 +28,17 @@ * board/config.h - configuration options, board specific * * "EP8260 H, V.1.1" - * - 64M 60x Bus SDRAM - * - 32M Local Bus SDRAM - * - 16M Flash (4 x AM29DL323DB90WDI) - * - 128k NVRAM with RTC + * - 64M 60x Bus SDRAM + * - 32M Local Bus SDRAM + * - 16M Flash (4 x AM29DL323DB90WDI) + * - 128k NVRAM with RTC * * "EP8260 H2, V.1.3" (CFG_EP8260_H2) - * - 300MHz/133MHz/66MHz - * - 64M 60x Bus SDRAM - * - 32M Local Bus SDRAM - * - 32M Flash - * - 128k NVRAM with RTC + * - 300MHz/133MHz/66MHz + * - 64M 60x Bus SDRAM + * - 32M Local Bus SDRAM + * - 32M Flash + * - 128k NVRAM with RTC */ #ifndef __CONFIG_H @@ -48,6 +48,8 @@ #define CFG_EP8260_H2 1 /* #undef CFG_EP8260_H2 */ +#define CONFIG_CPM2 1 /* Has a CPM2 */ + /* What is the oscillator's (UX2) frequency in Hz? */ #define CONFIG_8260_CLKIN (66 * 1000 * 1000) @@ -181,8 +183,7 @@ * for FCC) * * if CONFIG_ETHER_NONE is defined, then either the ethernet routines must be - * defined elsewhere (as for the console), or CFG_CMD_NET must be removed - * from CONFIG_COMMANDS to remove support for networking. + * defined elsewhere (as for the console), or CONFIG_CMD_NET must be unset. */ #undef CONFIG_ETHER_ON_SCC /* define if ethernet on SCC */ #define CONFIG_ETHER_ON_FCC /* define if ethernet on FCC */ @@ -251,7 +252,7 @@ * put in the same sector as U-Boot, and changing variables * will erase U-Boot temporarily */ -#define CFG_ENV_IN_OWN_SECT +#define CONFIG_ENV_IN_OWN_SECT /* Define to allow the user to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE @@ -289,37 +290,41 @@ #define CFG_HUSH_PARSER #define CFG_PROMPT_HUSH_PS2 "> " -/* What U-Boot subsytems do you want enabled? */ + /* -*/ -#define CONFIG_COMMANDS ( CFG_CMD_ALL & \ - ~( CFG_CMD_BMP | \ - CFG_CMD_BSP | \ - CFG_CMD_DCR | \ - CFG_CMD_DHCP | \ - CFG_CMD_DOC | \ - CFG_CMD_DTT | \ - CFG_CMD_EEPROM | \ - CFG_CMD_EXT2 | \ - CFG_CMD_FDC | \ - CFG_CMD_FDOS | \ - CFG_CMD_HWFLOW | \ - CFG_CMD_IDE | \ - CFG_CMD_JFFS2 | \ - CFG_CMD_KGDB | \ - CFG_CMD_MII | \ - CFG_CMD_MMC | \ - CFG_CMD_NAND | \ - CFG_CMD_PCI | \ - CFG_CMD_PCMCIA | \ - CFG_CMD_REISER | \ - CFG_CMD_SCSI | \ - CFG_CMD_SPI | \ - CFG_CMD_UNIVERSE| \ - CFG_CMD_USB | \ - CFG_CMD_VFD | \ - CFG_CMD_XIMG ) ) + * BOOTP options + */ +#define CONFIG_BOOTP_BOOTFILESIZE +#define CONFIG_BOOTP_BOOTPATH +#define CONFIG_BOOTP_GATEWAY +#define CONFIG_BOOTP_HOSTNAME + +/* + * Command line configuration. + */ +#include + +#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_BEDBUG +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_CDP +#define CONFIG_CMD_DATE +#define CONFIG_CMD_DIAG +#define CONFIG_CMD_ELF +#define CONFIG_CMD_FAT +#define CONFIG_CMD_I2C +#define CONFIG_CMD_IMMAP +#define CONFIG_CMD_IRQ +#define CONFIG_CMD_PING +#define CONFIG_CMD_PORTIO +#define CONFIG_CMD_REGINFO +#define CONFIG_CMD_SAVES +#define CONFIG_CMD_SDRAM +#define CONFIG_CMD_SNTP + +#undef CONFIG_CMD_DCR +#undef CONFIG_CMD_XIMG /* Where do the internal registers live? */ #define CFG_IMMR 0xF0000000 @@ -339,13 +344,10 @@ #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ -/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ -#include - /* * Miscellaneous configurable options */ -#if (CONFIG_COMMANDS & CFG_CMD_KGDB) +#if defined(CONFIG_CMD_KGDB) # define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ #else # define CFG_CBSIZE 256 /* Console I/O Buffer Size */ @@ -406,7 +408,7 @@ CFG_SBC_HRCW_IMMR |\ HRCW_APPC10 |\ HRCW_CS10PC01 |\ - CFG_SBC_MODCK_H |\ + CFG_SBC_MODCK_H |\ CFG_SBC_HRCW_BOOT_FLAGS) #else #define CFG_HRCW_MASTER 0x10400245 @@ -463,24 +465,29 @@ #define CFG_MAX_FLASH_SECT 71 /* max number of sectors on one chip */ #endif +#ifdef CFG_EP8260_H2 +#define CFG_FLASH_ERASE_TOUT 240000 /* Timeout for Flash Erase (in ms) */ +#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ +#else #define CFG_FLASH_ERASE_TOUT 8000 /* Timeout for Flash Erase (in ms) */ #define CFG_FLASH_WRITE_TOUT 1 /* Timeout for Flash Write (in ms) */ +#endif #ifndef CFG_RAMBOOT -# define CFG_ENV_IS_IN_FLASH 1 +# define CONFIG_ENV_IS_IN_FLASH 1 -# ifdef CFG_ENV_IN_OWN_SECT -# define CFG_ENV_ADDR (CFG_MONITOR_BASE + 0x40000) -# define CFG_ENV_SECT_SIZE 0x40000 +# ifdef CONFIG_ENV_IN_OWN_SECT +# define CONFIG_ENV_ADDR (CFG_MONITOR_BASE + 0x40000) +# define CONFIG_ENV_SECT_SIZE 0x40000 # else -# define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_MONITOR_LEN - CFG_ENV_SECT_SIZE) -# define CFG_ENV_SIZE 0x1000 /* Total Size of Environment Sector */ -# define CFG_ENV_SECT_SIZE 0x10000 /* see README - env sect real size */ -# endif /* CFG_ENV_IN_OWN_SECT */ +# define CONFIG_ENV_ADDR (CFG_FLASH_BASE + CFG_MONITOR_LEN - CONFIG_ENV_SECT_SIZE) +# define CONFIG_ENV_SIZE 0x1000 /* Total Size of Environment Sector */ +# define CONFIG_ENV_SECT_SIZE 0x10000 /* see README - env sect real size */ +# endif /* CONFIG_ENV_IN_OWN_SECT */ #else -# define CFG_ENV_IS_IN_NVRAM 1 -# define CFG_ENV_ADDR (CFG_MONITOR_BASE - 0x1000) -# define CFG_ENV_SIZE 0x200 +# define CONFIG_ENV_IS_IN_NVRAM 1 +# define CONFIG_ENV_ADDR (CFG_MONITOR_BASE - 0x1000) +# define CONFIG_ENV_SIZE 0x200 #endif /* CFG_RAMBOOT */ /*----------------------------------------------------------------------- @@ -488,7 +495,7 @@ */ #define CFG_CACHELINE_SIZE 32 /* For MPC8260 CPU */ -#if (CONFIG_COMMANDS & CFG_CMD_KGDB) +#if defined(CONFIG_CMD_KGDB) # define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */ #endif @@ -604,7 +611,11 @@ * SCCR - System Clock Control 9-8 *----------------------------------------------------------------------- */ +#ifdef CFG_EP8260_H2 +#define CFG_SCCR (SCCR_DFBRG00) +#else #define CFG_SCCR (SCCR_DFBRG01) +#endif /*----------------------------------------------------------------------- * RCCR - RISC Controller Configuration 13-7 @@ -742,4 +753,22 @@ #define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ #define BOOTFLAG_WARM 0x02 /* Software reboot */ +/* + * JFFS2 partitions + * + */ +/* No command line, one static partition, whole device */ +#undef CONFIG_JFFS2_CMDLINE +#define CONFIG_JFFS2_DEV "nor0" +#define CONFIG_JFFS2_PART_SIZE 0xFFFFFFFF +#define CONFIG_JFFS2_PART_OFFSET 0x00000000 + +/* mtdparts command line support */ +/* Note: fake mtd_id used, no linux mtd map file */ +/* +#define CONFIG_JFFS2_CMDLINE +#define MTDIDS_DEFAULT "" +#define MTDPARTS_DEFAULT "" +*/ + #endif /* __CONFIG_H */