X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Febony.h;h=b05ba08afdad9a81a879db3c076480a14bec7440;hb=842033e6964e9e5d34aca893c1845416dd8ac2cc;hp=10f425dd1ed72e9b302b2917c6c760ccc95d896b;hpb=f61f1e150c84f5b9347fca79a4bc5f2286c545d2;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/ebony.h b/include/configs/ebony.h
index 10f425d..b05ba08 100644
--- a/include/configs/ebony.h
+++ b/include/configs/ebony.h
@@ -37,6 +37,8 @@
 #define CONFIG_BOARD_EARLY_INIT_F 1	    /* Call board_early_init_f	*/
 #define CONFIG_SYS_CLK_FREQ	33333333    /* external freq to pll	*/
 
+#define	CONFIG_SYS_TEXT_BASE	0xFFFC0000
+
 /*
  * Include common defines/options for all AMCC eval boards
  */
@@ -61,7 +63,6 @@
 #define CONFIG_SYS_SDRAM_BASE	    0x00000000	    /* _must_ be 0		*/
 #define CONFIG_SYS_FLASH_BASE	    0xff800000	    /* start of FLASH		*/
 #define CONFIG_SYS_PCI_MEMBASE	    0x80000000	    /* mapped pci memory	*/
-#define CONFIG_SYS_PERIPHERAL_BASE 0xe0000000	    /* internal peripherals	*/
 #define CONFIG_SYS_ISRAM_BASE	    0xc0000000	    /* internal SRAM		*/
 #define CONFIG_SYS_PCI_BASE	    0xd0000000	    /* internal PCI regs	*/
 
@@ -72,16 +73,15 @@
  * Initial RAM & stack pointer (placed in internal SRAM)
  *----------------------------------------------------------------------*/
 #define CONFIG_SYS_INIT_RAM_ADDR   CONFIG_SYS_ISRAM_BASE  /* Initial RAM address	*/
-#define CONFIG_SYS_INIT_RAM_END    0x2000	    /* End of used area in RAM	*/
-#define CONFIG_SYS_GBL_DATA_SIZE  128		    /* num bytes initial data	*/
+#define CONFIG_SYS_INIT_RAM_SIZE    0x2000	    /* Size of used area in RAM	*/
 
-#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
 
 /*-----------------------------------------------------------------------
  * Serial Port
  *----------------------------------------------------------------------*/
-#undef	CONFIG_SERIAL_SOFTWARE_FIFO
+#define CONFIG_CONS_INDEX	1	/* Use UART0			*/
 #define CONFIG_SYS_EXT_SERIAL_CLOCK	(1843200 * 6)	/* Ext clk @ 11.059 MHz */
 
 /*-----------------------------------------------------------------------
@@ -177,6 +177,7 @@
  */
 /* General PCI */
 #define CONFIG_PCI			            /* include pci support	        */
+#define CONFIG_PCI_INDIRECT_BRIDGE	/* indirect PCI bridge support */
 #define CONFIG_PCI_PNP			        /* do pci plug-and-play         */
 #define CONFIG_PCI_SCAN_SHOW            /* show pci devices on startup  */
 #define CONFIG_SYS_PCI_TARGBASE    0x80000000  /* PCIaddr mapped to CONFIG_SYS_PCI_MEMBASE */