X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Feb_cpu5282.h;h=6a5e1d3a7534e78b18d82f211843161821fdb8f5;hb=92832045c54586e9dffa082ff8cd8c2ef6040757;hp=edd948522e5662635165192c2cacdbcf260b2e96;hpb=02ccab1908c405fe1449457d4a0d343784a30acb;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/eb_cpu5282.h b/include/configs/eb_cpu5282.h
index edd9485..6a5e1d3 100644
--- a/include/configs/eb_cpu5282.h
+++ b/include/configs/eb_cpu5282.h
@@ -1,9 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Configuation settings for the BuS EB+CPU5283 boards (aka EB+MCF-EV123)
  *
  * (C) Copyright 2005-2009 BuS Elektronik GmbH & Co.KG <esw@bus-elektonik.de>
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #ifndef _CONFIG_EB_CPU5282_H_
@@ -15,8 +14,6 @@
  * High Level Configuration Options (easy to change)                    *
  *----------------------------------------------------------------------*/
 
-#define CONFIG_MISC_INIT_R
-
 #define CONFIG_MCFUART
 #define CONFIG_SYS_UART_PORT		(0)
 
@@ -30,7 +27,6 @@
 
 #define CONFIG_BOOT_RETRY_TIME	-1
 #define CONFIG_RESET_TO_RETRY
-#define CONFIG_SPLASH_SCREEN
 
 #define CONFIG_HW_WATCHDOG
 
@@ -41,37 +37,16 @@
  * Environment is in the second sector of the first 256k of flash	*
  *----------------------------------------------------------------------*/
 
-#define CONFIG_ENV_ADDR		0xFF040000
-#define CONFIG_ENV_SECT_SIZE	0x00020000
-#define CONFIG_ENV_IS_IN_FLASH	1
-
 /*
  * BOOTP options
  */
 #define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-
-/*
- * Command line configuration.
- */
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_CMD_DATE
 
 #define CONFIG_MCFTMR
 
-#define	CONFIG_SYS_LONGHELP	1
-
 #define	CONFIG_SYS_CBSIZE	1024	/* Console I/O Buffer Size	*/
-#define	CONFIG_SYS_PBSIZE 	(CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
-#define	CONFIG_SYS_MAXARGS	16	/* max number of command args	*/
 #define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE
 
-#define CONFIG_SYS_LOAD_ADDR		0x20000
-
-#define CONFIG_SYS_MEMTEST_START	0x100000
-#define CONFIG_SYS_MEMTEST_END		0x400000
 /*#define CONFIG_SYS_DRAM_TEST		1 */
 #undef CONFIG_SYS_DRAM_TEST
 
@@ -89,18 +64,13 @@
  * Network								*
  *----------------------------------------------------------------------*/
 
-#define CONFIG_MCFFEC
-#define CONFIG_MII			1
+#ifdef CONFIG_MCFFEC
 #define CONFIG_MII_INIT			1
 #define CONFIG_SYS_DISCOVER_PHY
 #define CONFIG_SYS_RX_ETH_BUFFER	8
 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
-
-#define CONFIG_SYS_FEC0_PINMUX		0
-#define CONFIG_SYS_FEC0_MIIBASE		CONFIG_SYS_FEC0_IOBASE
-#define MCFFEC_TOUT_LOOP		50000
-
 #define CONFIG_OVERWRITE_ETHADDR_ONCE
+#endif
 
 /*-------------------------------------------------------------------------
  * Low Level Configuration Settings
@@ -132,7 +102,6 @@
 #define	CONFIG_SYS_SDRAM_SIZE		CONFIG_SYS_SDRAM_SIZE0
 
 #define CONFIG_SYS_MONITOR_LEN		0x20000
-#define CONFIG_SYS_MALLOC_LEN		(4 * 1024 * 1024)
 #define CONFIG_SYS_BOOTPARAMS_LEN	64*1024
 
 /*
@@ -154,10 +123,7 @@
 #define	CONFIG_SYS_MAX_FLASH_SECT	128
 #define	CONFIG_SYS_MAX_FLASH_BANKS	1
 #define	CONFIG_SYS_FLASH_ERASE_TOUT	10000000
-#define	CONFIG_SYS_FLASH_PROTECTION
 
-#define CONFIG_SYS_FLASH_CFI
-#define CONFIG_FLASH_CFI_DRIVER
 #define CONFIG_SYS_FLASH_SIZE		16*1024*1024
 #define CONFIG_SYS_FLASH_CFI_WIDTH	FLASH_CFI_16BIT
 
@@ -166,7 +132,6 @@
 /*-----------------------------------------------------------------------
  * Cache Configuration
  */
-#define CONFIG_SYS_CACHELINE_SIZE	16
 
 #define ICACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
 					 CONFIG_SYS_INIT_RAM_SIZE - 8)
@@ -225,15 +190,8 @@
  * I2C
  */
 
-#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
-
-#define CONFIG_SYS_FSL_I2C_OFFSET	0x00000300
 #define CONFIG_SYS_IMMR			CONFIG_SYS_MBAR
 
-#define CONFIG_SYS_FSL_I2C_SPEED	100000
-#define CONFIG_SYS_FSL_I2C_SLAVE	0
-
 #ifdef CONFIG_CMD_DATE
 #define CONFIG_RTC_DS1338
 #define CONFIG_I2C_RTC_ADDR		0x68
@@ -243,9 +201,6 @@
  * VIDEO configuration
  */
 
-#ifdef CONFIG_VIDEO
-#define CONFIG_VIDEO_VCXK			1
-
 #define CONFIG_SYS_VCXK_DEFAULT_LINEALIGN	2
 #define	CONFIG_SYS_VCXK_DOUBLEBUFFERED		1
 #define CONFIG_SYS_VCXK_BASE			CONFIG_SYS_CS2_BASE
@@ -266,6 +221,5 @@
 #define CONFIG_SYS_VCXK_INVERT_DDR		MCFGPIO_DDRE
 #define CONFIG_SYS_VCXK_INVERT_PIN		MCFGPIO_PORT2
 
-#endif /* CONFIG_VIDEO */
 #endif	/* _CONFIG_M5282EVB_H */
 /*---------------------------------------------------------------------*/