X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fdlvision-10g.h;h=6b3cd15cb65d2c051a9ed6ae81093897fd579dc1;hb=0ff27d4a94637d4b1937c625d33212375bd118d9;hp=6153a40e06198cc7fcac99fd2c906d6f1c08dbd0;hpb=22692ec0fbdb455ca16d4d0e27768c6b6deb4243;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/dlvision-10g.h b/include/configs/dlvision-10g.h index 6153a40..6b3cd15 100644 --- a/include/configs/dlvision-10g.h +++ b/include/configs/dlvision-10g.h @@ -17,20 +17,14 @@ * Include common defines/options for all AMCC eval boards */ #define CONFIG_HOSTNAME dlvsion-10g -#define CONFIG_IDENT_STRING " dlvision-10g 0.06" #include "amcc-common.h" -#define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_BOARD_EARLY_INIT_R #define CONFIG_MISC_INIT_R #define CONFIG_LAST_STAGE_INIT #define CONFIG_SYS_CLK_FREQ 33333333 /* external frequency to pll */ -#undef CONFIG_ZERO_BOOTDELAY_CHECK /* ignore keypress on bootdelay==0 */ -#define CONFIG_AUTOBOOT_KEYED /* use key strings to stop autoboot */ -#define CONFIG_AUTOBOOT_STOP_STR " " - /* * Configure PLL */ @@ -38,8 +32,6 @@ #define PLLMR1_DEFAULT PLLMR1_266_133_66 /* new uImage format support */ -#define CONFIG_FIT -#define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */ #define CONFIG_FIT_DISABLE_SHA256 #define CONFIG_ENV_IS_IN_FLASH /* use FLASH for environment vars */ @@ -66,13 +58,9 @@ * Commands additional to the ones defined in amcc-common.h */ #define CONFIG_CMD_DTT -#undef CONFIG_CMD_DHCP #undef CONFIG_CMD_DIAG #undef CONFIG_CMD_EEPROM -#undef CONFIG_CMD_ELF -#undef CONFIG_CMD_I2C #undef CONFIG_CMD_IRQ -#undef CONFIG_CMD_NFS /* * SDRAM configuration (please see cpu/ppc/sdram.[ch]) @@ -109,17 +97,22 @@ #define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F #define CONFIG_SYS_I2C_IHS +#define CONFIG_SYS_I2C_IHS_DUAL #define CONFIG_SYS_I2C_IHS_CH0 #define CONFIG_SYS_I2C_IHS_SPEED_0 50000 #define CONFIG_SYS_I2C_IHS_SLAVE_0 0x7F +#define CONFIG_SYS_I2C_IHS_SPEED_0_1 50000 +#define CONFIG_SYS_I2C_IHS_SLAVE_0_1 0x7F #define CONFIG_SYS_I2C_IHS_CH1 #define CONFIG_SYS_I2C_IHS_SPEED_1 50000 #define CONFIG_SYS_I2C_IHS_SLAVE_1 0x7F +#define CONFIG_SYS_I2C_IHS_SPEED_1_1 50000 +#define CONFIG_SYS_I2C_IHS_SLAVE_1_1 0x7F -#define CONFIG_SYS_SPD_BUS_NUM 2 +#define CONFIG_SYS_SPD_BUS_NUM 4 /* Temp sensor/hwmon/dtt */ -#define CONFIG_SYS_DTT_BUS_NUM 2 +#define CONFIG_SYS_DTT_BUS_NUM 4 #define CONFIG_DTT_LM63 1 /* National LM63 */ #define CONFIG_DTT_SENSORS { 0x4c, 0x4e, 0x18 } /* Sensor addresses */ #define CONFIG_DTT_PWM_LOOKUPTABLE \ @@ -127,8 +120,9 @@ { 54, 27 }, { 56, 31 }, { 58, 36 }, { 60, 40 } } #define CONFIG_DTT_TACH_LIMIT 0xa10 -#define CONFIG_SYS_ICS8N3QV01_I2C {0, 1} -#define CONFIG_SYS_SIL1178_I2C {0, 1} +#define CONFIG_SYS_ICS8N3QV01_I2C {1, 3} +#define CONFIG_SYS_SIL1178_I2C {0, 2} +#define CONFIG_SYS_DP501_I2C {0, 2} /* EBC peripherals */ @@ -238,10 +232,10 @@ #define CONFIG_SYS_OCM_DATA_ADDR 0xF8000000 #define CONFIG_SYS_OCM_DATA_SIZE 0x1000 #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_OCM_DATA_ADDR /* in SDRAM */ -#define CONFIG_SYS_INIT_RAM_END CONFIG_SYS_OCM_DATA_SIZE /* End of used area */ +#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_OCM_DATA_SIZE #define CONFIG_SYS_GBL_DATA_OFFSET \ - (CONFIG_SYS_INIT_RAM_END - GENERATED_GBL_DATA_SIZE) + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET /* @@ -331,5 +325,7 @@ */ #define CONFIG_SYS_MPC92469AC #define CONFIG_SYS_OSD_SCREENS CONFIG_SYS_FPGA_COUNT +#define CONFIG_SYS_DP501_DIFFERENTIAL +#define CONFIG_SYS_DP501_VCAPCTRL0 0x01 /* DDR mode 0, DE for H/VSYNC */ #endif /* __CONFIG_H */