X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fdigsy_mtc.h;h=c738b3ab4444d1833328692738da6d4c9d5728a1;hb=22a9ea974bdf18e6adad5c4f80b1c60ef384690c;hp=2e9a13f7e4a609941a847544a87a7b55206a20d0;hpb=083d506937002f2795c80fe0c3ae194ad2c3d085;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/digsy_mtc.h b/include/configs/digsy_mtc.h
index 2e9a13f..c738b3a 100644
--- a/include/configs/digsy_mtc.h
+++ b/include/configs/digsy_mtc.h
@@ -249,9 +249,16 @@
 /*
  * RTC configuration
  */
+#if defined(CONFIG_DIGSY_REV5)
+#define CONFIG_SYS_I2C_RTC_ADDR	0x56
+#define CONFIG_RTC_RV3029
+/* Enable 5k Ohm trickle charge resistor */
+#define CONFIG_SYS_RV3029_TCR	0x20
+#else
 #define CONFIG_RTC_DS1337
 #define CONFIG_SYS_I2C_RTC_ADDR	0x68
 #define CONFIG_SYS_DS1339_TCR_VAL	0xAB	/* diode + 4k resistor */
+#endif
 
 /*
  * Flash configuration
@@ -259,14 +266,24 @@
 #define	CONFIG_SYS_FLASH_CFI		1
 #define	CONFIG_FLASH_CFI_DRIVER	1
 
+#if defined(CONFIG_DIGSY_REV5)
+#define CONFIG_SYS_FLASH_BASE		0xFE000000
+#define CONFIG_SYS_FLASH_BASE_CS1	0xFC000000
+#define CONFIG_SYS_MAX_FLASH_BANKS	2
+#define CONFIG_SYS_FLASH_BANKS_LIST	{ CONFIG_SYS_FLASH_BASE, \
+					CONFIG_SYS_FLASH_BASE_CS1}
+#define CONFIG_SYS_UPDATE_FLASH_SIZE
+#define CONFIG_FDT_FIXUP_NOR_FLASH_SIZE
+#else
 #define CONFIG_SYS_FLASH_BASE		0xFF000000
-#define CONFIG_SYS_FLASH_SIZE	0x01000000
-
 #define CONFIG_SYS_MAX_FLASH_BANKS	1
+#define CONFIG_SYS_FLASH_BANKS_LIST	{ CONFIG_SYS_FLASH_BASE }
+#endif
+
 #define CONFIG_SYS_MAX_FLASH_SECT	256
 #define CONFIG_FLASH_16BIT
 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
-#define CONFIG_SYS_FLASH_BANKS_LIST	{ CONFIG_SYS_FLASH_BASE }
+#define CONFIG_SYS_FLASH_SIZE	0x01000000
 #define CONFIG_SYS_FLASH_ERASE_TOUT	240000
 #define CONFIG_SYS_FLASH_WRITE_TOUT	500
 
@@ -308,11 +325,10 @@
  *  Use SRAM until RAM will be available
  */
 #define CONFIG_SYS_INIT_RAM_ADDR	MPC5XXX_SRAM
-#define CONFIG_SYS_INIT_RAM_END		MPC5XXX_SRAM_SIZE
+#define CONFIG_SYS_INIT_RAM_SIZE		MPC5XXX_SRAM_SIZE
 
-#define CONFIG_SYS_GBL_DATA_SIZE	4096
 #define CONFIG_SYS_GBL_DATA_OFFSET	\
-	(CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
 
 #define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_TEXT_BASE
@@ -329,7 +345,11 @@
  */
 #define CONFIG_MPC5xxx_FEC	1
 #define CONFIG_MPC5xxx_FEC_MII100
+#if defined(CONFIG_DIGSY_REV5)
+#define CONFIG_PHY_ADDR		0x01
+#else
 #define CONFIG_PHY_ADDR		0x00
+#endif
 #define CONFIG_PHY_RESET_DELAY	1000
 
 #define CONFIG_NETCONSOLE		/* include NetConsole support	*/
@@ -410,6 +430,12 @@
 #define CONFIG_SYS_CS0_SIZE		CONFIG_SYS_FLASH_SIZE
 #define CONFIG_SYS_CS0_CFG		0x0002DD00
 
+#if defined(CONFIG_DIGSY_REV5)
+#define CONFIG_SYS_CS1_START		CONFIG_SYS_FLASH_BASE_CS1
+#define CONFIG_SYS_CS1_SIZE		CONFIG_SYS_FLASH_SIZE
+#define CONFIG_SYS_CS1_CFG		0x0002DD00
+#endif
+
 #define CONFIG_SYS_CS_BURST		0x00000000
 #define CONFIG_SYS_CS_DEADCYCLE	0x11111111