X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fdigsy_mtc.h;h=76ec168c202ee2c0203b6c852fffec731f8e85cc;hb=1d2f74690cace803844bce198a6d5fa1b6cd11f9;hp=66badd70243da8f47e526dae26e73285eb7a142a;hpb=c0a14aedc3440d6591b8c86d45861a0a8b46e11d;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/digsy_mtc.h b/include/configs/digsy_mtc.h index 66badd7..76ec168 100644 --- a/include/configs/digsy_mtc.h +++ b/include/configs/digsy_mtc.h @@ -10,23 +10,7 @@ * (C) Copyright 2009 Semihalf * Optimized for digsyMTC by: Grzegorz Bernacki * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software\; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation\; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY\; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program\; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA + * SPDX-License-Identifier: GPL-2.0+ */ #ifndef __CONFIG_H @@ -36,14 +20,22 @@ * High Level Configuration Options */ -#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */ -#define CONFIG_MPC5200 1 /* (more precisely an MPC5200 CPU) */ +#define CONFIG_MPC5200 1 /* This is an MPC5200 CPU */ #define CONFIG_DIGSY_MTC 1 /* ... on InterControl digsyMTC board */ +#define CONFIG_DISPLAY_BOARDINFO +#define CONFIG_SYS_GENERIC_BOARD -#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 +/* + * Valid values for CONFIG_SYS_TEXT_BASE are: + * 0xFFF00000 boot high (standard configuration) + * 0xFE000000 boot low + * 0x00100000 boot from RAM (for testing only) + */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 /* Standard: boot high */ +#endif -#define BOOTFLAG_COLD 0x01 -#define BOOTFLAG_WARM 0x02 +#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 #define CONFIG_SYS_CACHELINE_SIZE 32 @@ -63,6 +55,7 @@ #define CONFIG_PCI 1 #define CONFIG_PCI_PNP 1 #define CONFIG_PCI_SCAN_SHOW 1 +#define CONFIG_PCI_BOOTDELAY 250 #define CONFIG_PCI_MEM_BUS 0x40000000 #define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS @@ -79,11 +72,38 @@ #define CONFIG_BZIP2 /* + * Video + */ +#define CONFIG_VIDEO + +#ifdef CONFIG_VIDEO +#define CONFIG_VIDEO_MB862xx +#define CONFIG_VIDEO_MB862xx_ACCEL +#define CONFIG_VIDEO_CORALP +#define CONFIG_CFB_CONSOLE +#define CONFIG_VIDEO_LOGO +#define CONFIG_VIDEO_BMP_LOGO +#define CONFIG_VIDEO_SW_CURSOR +#define CONFIG_VGA_AS_SINGLE_DEVICE +#define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define CONFIG_SPLASH_SCREEN +#define CONFIG_VIDEO_BMP_GZIP +#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (2 << 20) /* decompressed img */ + +/* Coral-PA clock frequency, geo and other both 133MHz */ +#define CONFIG_SYS_MB862xx_CCF 0x00050000 +/* Video SDRAM parameters */ +#define CONFIG_SYS_MB862xx_MMR 0x11d7fa72 +#endif + +/* * Command line configuration. */ #include -#define CONFIG_CMD_DFL +#ifdef CONFIG_VIDEO +#define CONFIG_CMD_BMP +#endif #define CONFIG_CMD_CACHE #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP @@ -100,9 +120,10 @@ #define CONFIG_CMD_PING #define CONFIG_CMD_REGINFO #define CONFIG_CMD_SAVES +#define CONFIG_CMD_SPI #define CONFIG_CMD_USB -#if (TEXT_BASE == 0xFF000000) +#if (CONFIG_SYS_TEXT_BASE == 0xFF000000) #define CONFIG_SYS_LOWBOOT 1 #endif @@ -113,29 +134,115 @@ #undef CONFIG_BOOTARGS -#define CONFIG_EXTRA_ENV_SETTINGS \ - "netdev=eth0\0" \ - "console=ttyPSC0\0" \ - "kernel_addr_r=400000\0" \ - "fdt_addr_r=600000\0" \ - "nfsargs=setenv bootargs root=/dev/nfs rw " \ - "nfsroot=${serverip}:${rootpath}\0" \ - "addip=setenv bootargs ${bootargs} " \ - "ip=${ipaddr}:${serverip}:${gatewayip}:"\ - "${netmask}:${hostname}:${netdev}:off panic=1\0" \ +#define CONFIG_EXTRA_ENV_SETTINGS \ + "fw_image=digsyMPC.img\0" \ + "mtcb_start=mtc led diag orange; run mtcb_1\0" \ + "mtcb_clearled=for x in user1 user2 usbpwr usbbusy; " \ + "do mtc led $x; done\0" \ + "mtcb_1=if mtc key; then run mtcb_clearled mtcb_update; " \ + "else run mtcb_fw; fi\0" \ + "mtcb_fw=if bootm ff000000; then echo FIRMWARE OK!; " \ + "else echo BAD FIRMWARE CRC!; mtc led diag red; fi\0" \ + "mtcb_update=mtc led user1 orange;" \ + "while mtc key; do ; done; run mtcb_2;\0" \ + "mtcb_2=mtc led user1 green 2; usb reset; run mtcb_usb1;\0" \ + "mtcb_usb1=if fatload usb 0 400000 script.img; " \ + "then run mtcb_doscript; else run mtcb_usb2; fi\0" \ + "mtcb_usb2=if fatload usb 0 400000 $fw_image; " \ + "then run mtcb_dousb; else run mtcb_ide; fi\0" \ + "mtcb_doscript=run mtcb_usbleds; mtc led user2 orange 2; " \ + "run mtcb_wait_flickr mtcb_ds_1;\0" \ + "mtcb_ds_1=if imi 400000; then mtc led usbbusy; " \ + "source 400000; else run mtcb_error; fi\0" \ + "mtcb_dousb=run mtcb_usbleds mtcb_wait_flickr mtcb_du_1;\0" \ + "mtcb_du_1=if imi 400000; then run mtcb_du_2; " \ + "else run mtcb_error; fi\0" \ + "mtcb_du_2=run mtcb_clear mtcb_prog; mtc led usbbusy; " \ + "run mtcb_checkfw\0" \ + "mtcb_checkfw=if imi ff000000; then run mtcb_success; " \ + "else run mtcb_error; fi\0" \ + "mtcb_waitkey=mtc key; until test $? -eq 0; do mtc key; done\0" \ + "mtcb_wait_flickr=run mtcb_waitkey mtcb_uledflckr\0" \ + "mtcb_usbleds=mtc led usbpwr green; mtc led usbbusy orange 1;\0"\ + "mtcb_uledflckr=mtc led user1 orange 11\0" \ + "mtcb_error=mtc led user1 red\0" \ + "mtcb_clear=erase ff000000 ff0fffff\0" \ + "mtcb_prog=cp.b 400000 ff000000 ${filesize}\0" \ + "mtcb_success=mtc led user1 green\0" \ + "mtcb_ide=if fatload ide 0 400000 $fw_image;" \ + "then run mtcb_doide; else run mtcb_error; fi\0" \ + "mtcb_doide=mtc led user2 green 1;" \ + "run mtcb_wait_flickr mtcb_di_1;\0" \ + "mtcb_di_1=if imi 400000; then run mtcb_di_2;" \ + "else run mtcb_error; fi\0" \ + "mtcb_di_2=run mtcb_clear; run mtcb_prog mtcb_checkfw\0" \ + "ramdisk_num_sector=16\0" \ + "flash_base=ff000000\0" \ + "flashdisk_size=e00000\0" \ + "env_sector=fff60000\0" \ + "flashdisk_start=ff100000\0" \ + "load_cmd=tftp 400000 digsyMPC.img\0" \ + "clear_cmd=erase ff000000 ff0fffff\0" \ + "flash_cmd=cp.b 400000 ff000000 ${filesize}\0" \ + "update_cmd=run load_cmd; " \ + "iminfo 400000; " \ + "run clear_cmd flash_cmd; " \ + "iminfo ff000000\0" \ + "spi_driver=yes\0" \ + "spi_watchdog=no\0" \ + "ftps_start=yes\0" \ + "ftps_user1=admin\0" \ + "ftps_pass1=admin\0" \ + "ftps_base1=/\0" \ + "ftps_home1=/\0" \ + "plc_sio_srv=no\0" \ + "plc_sio_baud=57600\0" \ + "plc_sio_parity=no\0" \ + "plc_sio_stop=1\0" \ + "plc_sio_com=2\0" \ + "plc_eth_srv=yes\0" \ + "plc_eth_port=1200\0" \ + "plc_root=/ide/\0" \ + "diag_level=0\0" \ + "webvisu=no\0" \ + "plc_can1_routing=no\0" \ + "plc_can1_baudrate=250\0" \ + "plc_can2_routing=no\0" \ + "plc_can2_baudrate=250\0" \ + "plc_can3_routing=no\0" \ + "plc_can3_baudrate=250\0" \ + "plc_can4_routing=no\0" \ + "plc_can4_baudrate=250\0" \ + "netdev=eth0\0" \ + "console=ttyPSC0\0" \ + "kernel_addr_r=400000\0" \ + "fdt_addr_r=600000\0" \ + "nfsargs=setenv bootargs root=/dev/nfs rw " \ + "nfsroot=${serverip}:${rootpath}\0" \ + "addip=setenv bootargs ${bootargs} " \ + "ip=${ipaddr}:${serverip}:${gatewayip}:" \ + "${netmask}:${hostname}:${netdev}:off panic=1\0" \ "addcons=setenv bootargs ${bootargs} console=${console},${baudrate}\0"\ - "rootpath=/opt/eldk/ppc_6xx\0" \ - "net_nfs=tftp ${kernel_addr_r} ${bootfile};" \ - "tftp ${fdt_addr_r} ${fdt_file};" \ - "run nfsargs addip addcons;" \ - "bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \ - "load=tftp 200000 ${u-boot}\0" \ - "update=protect off FFF00000 +${filesize};" \ - "erase FFF00000 +${filesize};" \ - "cp.b 200000 FFF00000 ${filesize};" \ - "protect on FFF00000 +${filesize}\0" \ + "rootpath=/opt/eldk/ppc_6xx\0" \ + "net_nfs=tftp ${kernel_addr_r} ${bootfile};" \ + "tftp ${fdt_addr_r} ${fdt_file};" \ + "run nfsargs addip addcons;" \ + "bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \ + "load=tftp 200000 ${u-boot}\0" \ + "update=protect off FFF00000 +${filesize};" \ + "erase FFF00000 +${filesize};" \ + "cp.b 200000 FFF00000 ${filesize};" \ + "protect on FFF00000 +${filesize}\0" \ "" +#define CONFIG_BOOTCOMMAND "run mtcb_start" + +/* + * SPI configuration + */ +#define CONFIG_HARD_SPI 1 +#define CONFIG_MPC52XX_SPI 1 + /* * I2C configuration */ @@ -155,8 +262,16 @@ /* * RTC configuration */ +#if defined(CONFIG_DIGSY_REV5) +#define CONFIG_SYS_I2C_RTC_ADDR 0x56 +#define CONFIG_RTC_RV3029 +/* Enable 5k Ohm trickle charge resistor */ +#define CONFIG_SYS_RV3029_TCR 0x20 +#else #define CONFIG_RTC_DS1337 #define CONFIG_SYS_I2C_RTC_ADDR 0x68 +#define CONFIG_SYS_DS1339_TCR_VAL 0xAB /* diode + 4k resistor */ +#endif /* * Flash configuration @@ -164,14 +279,24 @@ #define CONFIG_SYS_FLASH_CFI 1 #define CONFIG_FLASH_CFI_DRIVER 1 +#if defined(CONFIG_DIGSY_REV5) +#define CONFIG_SYS_FLASH_BASE 0xFE000000 +#define CONFIG_SYS_FLASH_BASE_CS1 0xFC000000 +#define CONFIG_SYS_MAX_FLASH_BANKS 2 +#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE, \ + CONFIG_SYS_FLASH_BASE_CS1} +#define CONFIG_SYS_UPDATE_FLASH_SIZE +#define CONFIG_FDT_FIXUP_NOR_FLASH_SIZE +#else #define CONFIG_SYS_FLASH_BASE 0xFF000000 -#define CONFIG_SYS_FLASH_SIZE 0x01000000 - #define CONFIG_SYS_MAX_FLASH_BANKS 1 +#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } +#endif + #define CONFIG_SYS_MAX_FLASH_SECT 256 #define CONFIG_FLASH_16BIT #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT -#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } +#define CONFIG_SYS_FLASH_SIZE 0x01000000 #define CONFIG_SYS_FLASH_ERASE_TOUT 240000 #define CONFIG_SYS_FLASH_WRITE_TOUT 500 @@ -213,14 +338,13 @@ * Use SRAM until RAM will be available */ #define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM -#define CONFIG_SYS_INIT_RAM_END MPC5XXX_SRAM_SIZE +#define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE -#define CONFIG_SYS_GBL_DATA_SIZE 4096 #define CONFIG_SYS_GBL_DATA_OFFSET \ - (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) #define CONFIG_SYS_RAMBOOT 1 #endif @@ -234,13 +358,33 @@ */ #define CONFIG_MPC5xxx_FEC 1 #define CONFIG_MPC5xxx_FEC_MII100 +#if defined(CONFIG_DIGSY_REV5) +#define CONFIG_PHY_ADDR 0x01 +#else #define CONFIG_PHY_ADDR 0x00 +#endif #define CONFIG_PHY_RESET_DELAY 1000 #define CONFIG_NETCONSOLE /* include NetConsole support */ /* * GPIO configuration + * use pin gpio_wkup_6 as second SDRAM chip select (mem_cs1) + * Bit 0 (mask 0x80000000) : 0x1 + * SPI on Tmr2/3/4/5 pins + * Bit 2:3 (mask 0x30000000) : 0x2 + * ATA cs0/1 on csb_4/5 + * Bit 6:7 (mask 0x03000000) : 0x2 + * Ethernet 100Mbit with MD + * Bits 12:15 (mask 0x000f0000): 0x5 + * USB - Two UARTs + * Bits 18:19 (mask 0x00003000) : 0x2 + * PSC3 - USB2 on PSC3 + * Bits 20:23 (mask 0x00000f00) : 0x1 + * PSC2 - CAN1&2 on PSC2 pins + * Bits 25:27 (mask 0x00000070) : 0x1 + * PSC1 - AC97 functionality + * Bits 29:31 (mask 0x00000007) : 0x2 */ #define CONFIG_SYS_GPS_PORT_CONFIG 0xA2552112 @@ -249,9 +393,8 @@ */ #define CONFIG_SYS_LONGHELP #define CONFIG_AUTO_COMPLETE 1 -#define CONFIG_SYS_PROMPT "=> " +#define CONFIG_CMDLINE_EDITING 1 #define CONFIG_SYS_HUSH_PARSER -#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " #define CONFIG_AUTOBOOT_KEYED #define CONFIG_AUTOBOOT_PROMPT "autoboot in %d seconds\n", bootdelay @@ -273,8 +416,6 @@ #define CONFIG_SYS_LOAD_ADDR 0x00100000 -#define CONFIG_SYS_HZ 1000 - /* * Various low-level settings */ @@ -298,6 +439,12 @@ #define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE #define CONFIG_SYS_CS0_CFG 0x0002DD00 +#if defined(CONFIG_DIGSY_REV5) +#define CONFIG_SYS_CS1_START CONFIG_SYS_FLASH_BASE_CS1 +#define CONFIG_SYS_CS1_SIZE CONFIG_SYS_FLASH_SIZE +#define CONFIG_SYS_CS1_CFG 0x0002DD00 +#endif + #define CONFIG_SYS_CS_BURST 0x00000000 #define CONFIG_SYS_CS_DEADCYCLE 0x11111111