X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fdevkit8000.h;h=e81da677f4726061d6c2d7e8e3f1bb3244888cb0;hb=4b142febff71eabdb7ddbb125c7b583b24ddc434;hp=cd40da632091166535f1c1899cd1828068969246;hpb=0052a051f60a043f1730b3a46f23b3c7b0eb7820;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h
index cd40da6..e81da67 100644
--- a/include/configs/devkit8000.h
+++ b/include/configs/devkit8000.h
@@ -30,7 +30,6 @@
 
 #ifndef __CONFIG_H
 #define __CONFIG_H
-#include <asm/sizes.h>
 
 /* High Level Configuration Options */
 #define CONFIG_ARMCORTEXA8	1	/* This is an ARM V7 CPU core */
@@ -59,14 +58,17 @@
 #define CONFIG_REVISION_TAG		1
 
 /* Size of malloc() pool */
-#define CONFIG_ENV_SIZE			SZ_128K	/* Total Size Environment */
+#define CONFIG_ENV_SIZE			(128 << 10)	/* 128 KiB */
 						/* Sector */
-#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + SZ_128K)
+#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (128 << 10))
 #define CONFIG_SYS_GBL_DATA_SIZE	128	/* bytes reserved for */
 						/* initial data */
 
 /* Hardware drivers */
 
+/* DDR - I use Micron DDR */
+#define CONFIG_OMAP3_MICRON_DDR		1
+
 /* DM9000 */
 #define CONFIG_NET_MULTI		1
 #define CONFIG_NET_RETRY_COUNT		20
@@ -98,6 +100,7 @@
 #define CONFIG_DOS_PARTITION		1
 
 /* I2C */
+#define CONFIG_HARD_I2C			1
 #define CONFIG_SYS_I2C_SPEED		100000
 #define CONFIG_SYS_I2C_SLAVE		1
 #define CONFIG_SYS_I2C_BUS		0
@@ -129,8 +132,6 @@
 
 #define CONFIG_SYS_MAX_NAND_DEVICE	1		/* Max number of NAND */
 							/* devices */
-#define CONFIG_SYS_64BIT_VSPRINTF			/* needed for nand_util.c */
-
 #define CONFIG_JFFS2_NAND
 /* nand device jffs2 lives on */
 #define CONFIG_JFFS2_DEV		"nand0"
@@ -270,16 +271,16 @@
 #define CONFIG_SYS_HZ			1000
 
 /* The stack sizes are set up in start.S using the settings below */
-#define CONFIG_STACKSIZE		SZ_128K	/* regular stack */
+#define CONFIG_STACKSIZE	(128 << 10)	/* regular stack 128 KiB */
 #ifdef CONFIG_USE_IRQ
-#define CONFIG_STACKSIZE_IRQ		SZ_4K	/* IRQ stack */
-#define CONFIG_STACKSIZE_FIQ		SZ_4K	/* FIQ stack */
+#define CONFIG_STACKSIZE_IRQ		(4 << 10)	/* IRQ stack 4 KiB */
+#define CONFIG_STACKSIZE_FIQ		(4 << 10)	/* FIQ stack 4 KiB */
 #endif
 
 /*  Physical Memory Map  */
 #define CONFIG_NR_DRAM_BANKS		2 /* CS1 may or may not be populated */
 #define PHYS_SDRAM_1			OMAP34XX_SDRC_CS0
-#define PHYS_SDRAM_1_SIZE		SZ_128M	/* at least 128 meg */
+#define PHYS_SDRAM_1_SIZE		(128 << 20)	/* at least 128 MiB */
 #define PHYS_SDRAM_2			OMAP34XX_SDRC_CS1
 
 /* SDRAM Bank Allocation method */
@@ -288,7 +289,7 @@
 /* NAND and environment organization  */
 #define PISMO1_NAND_SIZE		GPMC_SIZE_128M
 
-#define CONFIG_SYS_MONITOR_LEN		SZ_256K	/* Reserve 2 sectors */
+#define CONFIG_SYS_MONITOR_LEN		(256 << 10)	/* Reserve 2 sectors */
 
 #define CONFIG_ENV_IS_IN_NAND		1
 #define SMNAND_ENV_OFFSET		0x260000 /* environment starts here */