X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fdevkit8000.h;h=baf1a73b956c803845aaf355a030220625df804d;hb=73b6e6ad254b36763419cdd3fdf406c0094517b7;hp=dfbbb21a04c73cc0908ff2071a6a1e16dff11c32;hpb=0bb430c8494e26e8d258cf6957cdd39d2ce4f309;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h index dfbbb21..baf1a73b 100644 --- a/include/configs/devkit8000.h +++ b/include/configs/devkit8000.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * (C) Copyright 2006-2008 * Texas Instruments. @@ -8,8 +9,6 @@ * Frederik Kriewitz * * Configuration settings for the DevKit8000 board. - * - * SPDX-License-Identifier: GPL-2.0+ */ #ifndef __CONFIG_H @@ -32,17 +31,12 @@ #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */ /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ #include -#define CONFIG_MISC_INIT_R - #define CONFIG_REVISION_TAG 1 /* Size of malloc() pool */ -#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ - /* Sector */ #undef CONFIG_SYS_MALLOC_LEN #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10)) @@ -57,18 +51,9 @@ #define CONFIG_DM9000_NO_SROM 1 #undef CONFIG_DM9000_DEBUG -/* SPI */ -#undef CONFIG_SPI - -/* I2C */ - /* TWL4030 */ -#define CONFIG_TWL4030_LED 1 /* Board NAND Info */ - -#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ - /* to access nand */ #define CONFIG_JFFS2_NAND /* nand device jffs2 lives on */ #define CONFIG_JFFS2_DEV "nand0" @@ -82,7 +67,6 @@ #define CONFIG_BOOTP_BOOTFILESIZE #define CONFIG_BOOTP_DNS2 #define CONFIG_BOOTP_SEND_HOSTNAME -#define CONFIG_BOOTP_NTPSERVER #define CONFIG_BOOTP_TIMEOFFSET #undef CONFIG_BOOTP_VENDOREX @@ -158,19 +142,12 @@ #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \ 0x01000000) /* 16MB */ -/* NAND and environment organization */ - -#define CONFIG_ENV_OFFSET 0x260000 - /* SRAM config */ #define CONFIG_SYS_SRAM_START 0x40200000 #define CONFIG_SYS_SRAM_SIZE 0x10000 /* Defines for SPL */ -#undef CONFIG_SPL_TEXT_BASE -#define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/ - /* NAND boot config */ #define CONFIG_SYS_NAND_5_ADDR_CYCLE #define CONFIG_SYS_NAND_PAGE_COUNT 64