X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fdevkit3250.h;h=ae9e4d4a2c88f6bd6a982056c02c3d79592e60d7;hb=504bf790da08db9b4a443566cf6ef577f9c7996a;hp=f1a5c6c90a9e011972b4f312eac45ad3e1f345e8;hpb=ec7483e34ea932fb68267dc0b1de30be51f271c9;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h
index f1a5c6c..ae9e4d4 100644
--- a/include/configs/devkit3250.h
+++ b/include/configs/devkit3250.h
@@ -1,9 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Embest/Timll DevKit3250 board configuration file
  *
  * Copyright (C) 2011-2015 Vladimir Zapolskiy <vz@mleia.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #ifndef __CONFIG_DEVKIT3250_H__
@@ -24,11 +23,9 @@
 /*
  * Memory configurations
  */
-#define CONFIG_NR_DRAM_BANKS		1
 #define CONFIG_SYS_MALLOC_LEN		SZ_1M
 #define CONFIG_SYS_SDRAM_BASE		EMC_DYCS0_BASE
 #define CONFIG_SYS_SDRAM_SIZE		SZ_64M
-#define CONFIG_SYS_TEXT_BASE		0x83F00000
 #define CONFIG_SYS_MEMTEST_START	(CONFIG_SYS_SDRAM_BASE + SZ_32K)
 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_TEXT_BASE - SZ_1M)
 
@@ -64,7 +61,6 @@
 /*
  * SSP/SPI
  */
-#define CONFIG_LPC32XX_SSP
 #define CONFIG_LPC32XX_SSP_TIMEOUT	100000
 
 /*
@@ -73,8 +69,6 @@
 #define CONFIG_RMII
 #define CONFIG_PHY_SMSC
 #define CONFIG_LPC32XX_ETH
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_ADDR			0x1F
 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
 
 /*
@@ -84,12 +78,10 @@
 #define CONFIG_SYS_MAX_FLASH_SECT	71
 #define CONFIG_SYS_FLASH_BASE		EMC_CS0_BASE
 #define CONFIG_SYS_FLASH_SIZE		SZ_4M
-#define CONFIG_SYS_FLASH_CFI
 
 /*
  * NAND controller
  */
-#define CONFIG_NAND_LPC32XX_SLC
 #define CONFIG_SYS_NAND_BASE		SLC_NAND_BASE
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
 #define CONFIG_SYS_NAND_BASE_LIST	{ CONFIG_SYS_NAND_BASE }
@@ -119,16 +111,9 @@
 /*
  * U-Boot General Configurations
  */
-#define CONFIG_SYS_LONGHELP
 #define CONFIG_SYS_CBSIZE		1024
-#define CONFIG_SYS_PBSIZE		\
-	(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CONFIG_SYS_MAXARGS		16
 #define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
 
-#define CONFIG_AUTO_COMPLETE
-#define CONFIG_CMDLINE_EDITING
-
 /*
  * Pass open firmware flat tree
  */
@@ -166,25 +151,21 @@
 #define CONFIG_SETUP_MEMORY_TAGS
 
 #define CONFIG_BOOTFILE			"uImage"
-#define CONFIG_BOOTARGS			"console=ttyS0,115200n8"
 #define CONFIG_LOADADDR			0x80008000
 
 /*
  * SPL specific defines
  */
 /* SPL will be executed at offset 0 */
-#define CONFIG_SPL_TEXT_BASE		0x00000000
 
 /* SPL will use SRAM as stack */
 #define CONFIG_SPL_STACK		0x0000FFF8
 
 /* Use the framework and generic lib */
-#define CONFIG_SPL_FRAMEWORK
 
 /* SPL will use serial */
 
 /* SPL loads an image from NAND */
-#define CONFIG_SPL_NAND_SIMPLE
 #define CONFIG_SPL_NAND_RAW_ONLY
 #define CONFIG_SPL_NAND_DRIVERS