X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fda850evm.h;h=41ff6676e06e907992bbc946ed1f28f62b1761e2;hb=f89d6133eef2e068f9c33853b6584d7fcbfa9d2e;hp=c6b5b28174b7913f6a8a2fa37cc1da73801464ff;hpb=d7869b2183d2b786e5410b97a5a6b2e630e7825e;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h
index c6b5b28..41ff667 100644
--- a/include/configs/da850evm.h
+++ b/include/configs/da850evm.h
@@ -23,8 +23,6 @@
 * DM support in SPL
 */
 #ifdef CONFIG_SPL_BUILD
-#undef CONFIG_DM_SPI
-#undef CONFIG_DM_SPI_FLASH
 #undef CONFIG_DM_I2C
 #undef CONFIG_DM_I2C_COMPAT
 #endif
@@ -36,6 +34,7 @@
 #define CONFIG_SYS_OSCIN_FREQ		24000000
 #define CONFIG_SYS_TIMERBASE		DAVINCI_TIMER0_BASE
 #define CONFIG_SYS_HZ_CLOCK		clk_get(DAVINCI_AUXCLK_CLKID)
+#define CONFIG_SKIP_LOWLEVEL_INIT
 
 #ifdef CONFIG_DIRECT_NOR_BOOT
 #define CONFIG_ARCH_CPU_INIT
@@ -49,7 +48,8 @@
 #define PHYS_SDRAM_1		DAVINCI_DDR_EMIF_DATA_BASE /* DDR Start */
 #define PHYS_SDRAM_1_SIZE	(64 << 20) /* SDRAM size 64MB */
 #define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) /* max size from SPRS586*/
-
+#define CONFIG_SPL_BSS_START_ADDR DAVINCI_DDR_EMIF_DATA_BASE
+#define CONFIG_SPL_BSS_MAX_SIZE 0x1080000
 /* memtest start addr */
 #define CONFIG_SYS_MEMTEST_START	(PHYS_SDRAM_1 + 0x2000000)
 
@@ -115,9 +115,8 @@
  * Serial Driver info
  */
 
-#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_DIRECT_NOR_BOOT)
+#if !CONFIG_IS_ENABLED(DM_SERIAL)
 #define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE	-4	/* NS16550 register size */
 #define CONFIG_SYS_NS16550_COM1	DAVINCI_UART2_BASE /* Base address of UART2 */
 #endif
 #define CONFIG_SYS_NS16550_CLK	clk_get(DAVINCI_UART2_CLKID)
@@ -125,8 +124,6 @@
 #define CONFIG_SYS_SPI_CLK		clk_get(DAVINCI_SPI1_CLKID)
 #ifdef CONFIG_SPL_BUILD
 #define CONFIG_SYS_SPI_BASE		DAVINCI_SPI1_BASE
-#define CONFIG_SF_DEFAULT_SPEED		30000000
-#define CONFIG_ENV_SPI_MAX_HZ	CONFIG_SF_DEFAULT_SPEED
 #endif
 
 #ifdef CONFIG_USE_SPIFLASH
@@ -138,7 +135,6 @@
  * I2C Configuration
  */
 #ifndef CONFIG_SPL_BUILD
-#define CONFIG_SYS_I2C_DAVINCI
 #define CONFIG_SYS_I2C_EXPANDER_ADDR   0x20
 #endif
 
@@ -146,8 +142,11 @@
  * Flash & Environment
  */
 #ifdef CONFIG_NAND
+#ifdef CONFIG_ENV_IS_IN_NAND
 #define CONFIG_ENV_OFFSET		0x0 /* Block 0--not used by bootcode */
 #define CONFIG_ENV_SIZE			(128 << 10)
+#define CONFIG_ENV_SECT_SIZE	(128 << 10)
+#endif
 #define	CONFIG_SYS_NAND_USE_FLASH_BBT
 #define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
 #define	CONFIG_SYS_NAND_PAGE_2K
@@ -161,8 +160,7 @@
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 #define CONFIG_SYS_NAND_PAGE_SIZE	(2 << 10)
 #define CONFIG_SYS_NAND_BLOCK_SIZE	(128 << 10)
-#define CONFIG_SYS_NAND_U_BOOT_OFFS	0x28000
-#define CONFIG_SYS_NAND_U_BOOT_SIZE	0x60000
+#define CONFIG_SYS_NAND_U_BOOT_SIZE	0x40000
 #define CONFIG_SYS_NAND_U_BOOT_DST	0xc1080000
 #define CONFIG_SYS_NAND_U_BOOT_START	CONFIG_SYS_NAND_U_BOOT_DST
 #define CONFIG_SYS_NAND_U_BOOT_RELOC_SP	(CONFIG_SYS_NAND_U_BOOT_DST - \
@@ -196,9 +194,6 @@
 #endif
 
 #ifdef CONFIG_USE_NOR
-#define CONFIG_FLASH_CFI_DRIVER
-#define CONFIG_SYS_FLASH_CFI
-#define CONFIG_SYS_FLASH_PROTECTION
 #define CONFIG_SYS_MAX_FLASH_BANKS	1 /* max number of flash banks */
 #define CONFIG_SYS_FLASH_SECT_SZ	(128 << 10) /* 128KB */
 #define CONFIG_ENV_OFFSET		(CONFIG_SYS_FLASH_SECT_SZ * 3)
@@ -211,9 +206,11 @@
 #endif
 
 #ifdef CONFIG_USE_SPIFLASH
+#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
 #define CONFIG_ENV_SIZE			(64 << 10)
 #define CONFIG_ENV_OFFSET		(512 << 10)
-#define CONFIG_ENV_SECT_SIZE		(64 << 10)
+#define CONFIG_ENV_SECT_SIZE	(64 << 10)
+#endif
 #ifdef CONFIG_SPL_BUILD
 #undef CONFIG_SPI_FLASH_MTD
 #endif
@@ -222,7 +219,6 @@
 /*
  * U-Boot general configuration
  */
-#define CONFIG_MISC_INIT_R
 #define CONFIG_BOOTFILE		"uImage" /* Boot file name */
 #define CONFIG_SYS_CBSIZE	1024 /* Console I/O Buffer Size	*/
 #define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */
@@ -277,7 +273,6 @@
 						CONFIG_SYS_MALLOC_LEN)
 #define CONFIG_SYS_SPL_MALLOC_SIZE	CONFIG_SYS_MALLOC_LEN
 #define CONFIG_SPL_STACK	0x8001ff00
-#define CONFIG_SPL_TEXT_BASE	0x80000000
 #define CONFIG_SPL_MAX_FOOTPRINT	32768
 #define CONFIG_SPL_PAD_TO	32768
 #endif