X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fda850evm.h;h=41ff6676e06e907992bbc946ed1f28f62b1761e2;hb=f89d6133eef2e068f9c33853b6584d7fcbfa9d2e;hp=2a6916b92ea1716d8a4c70c3e9c7f90eeb570417;hpb=16121280188d3daa57b18ad623d0845bbbb5a90a;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index 2a6916b..41ff667 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -1,11 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ * * Based on davinci_dvevm.h. Original Copyrights follow: * * Copyright (C) 2007 Sergey Kubushyn - * - * SPDX-License-Identifier: GPL-2.0+ */ #ifndef __CONFIG_H @@ -14,7 +13,6 @@ /* * Board */ -#define CONFIG_DRIVER_TI_EMAC /* check if direct NOR boot config is used */ #ifndef CONFIG_DIRECT_NOR_BOOT #define CONFIG_USE_SPIFLASH @@ -25,8 +23,6 @@ * DM support in SPL */ #ifdef CONFIG_SPL_BUILD -#undef CONFIG_DM_SPI -#undef CONFIG_DM_SPI_FLASH #undef CONFIG_DM_I2C #undef CONFIG_DM_I2C_COMPAT #endif @@ -38,14 +34,11 @@ #define CONFIG_SYS_OSCIN_FREQ 24000000 #define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE #define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID) +#define CONFIG_SKIP_LOWLEVEL_INIT #ifdef CONFIG_DIRECT_NOR_BOOT #define CONFIG_ARCH_CPU_INIT -#define CONFIG_DA8XX_GPIO -#define CONFIG_SYS_TEXT_BASE 0x60000000 #define CONFIG_SYS_DV_NOR_BOOT_CFG (0x11) -#else -#define CONFIG_SYS_TEXT_BASE 0xc1080000 #endif /* @@ -55,15 +48,14 @@ #define PHYS_SDRAM_1 DAVINCI_DDR_EMIF_DATA_BASE /* DDR Start */ #define PHYS_SDRAM_1_SIZE (64 << 20) /* SDRAM size 64MB */ #define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) /* max size from SPRS586*/ - +#define CONFIG_SPL_BSS_START_ADDR DAVINCI_DDR_EMIF_DATA_BASE +#define CONFIG_SPL_BSS_MAX_SIZE 0x1080000 /* memtest start addr */ #define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM_1 + 0x2000000) /* memtest will be run on 16MB */ #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + 0x2000000 + 16*1024*1024) -#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ - #define CONFIG_SYS_DA850_SYSCFG_SUSPSRC ( \ DAVINCI_SYSCFG_SUSPSRC_TIMER0 | \ DAVINCI_SYSCFG_SUSPSRC_SPI1 | \ @@ -74,20 +66,6 @@ /* * PLL configuration */ -#define CONFIG_SYS_DV_CLKMODE 0 -#define CONFIG_SYS_DA850_PLL0_POSTDIV 1 -#define CONFIG_SYS_DA850_PLL0_PLLDIV1 0x8000 -#define CONFIG_SYS_DA850_PLL0_PLLDIV2 0x8001 -#define CONFIG_SYS_DA850_PLL0_PLLDIV3 0x8002 -#define CONFIG_SYS_DA850_PLL0_PLLDIV4 0x8003 -#define CONFIG_SYS_DA850_PLL0_PLLDIV5 0x8002 -#define CONFIG_SYS_DA850_PLL0_PLLDIV6 CONFIG_SYS_DA850_PLL0_PLLDIV1 -#define CONFIG_SYS_DA850_PLL0_PLLDIV7 0x8005 - -#define CONFIG_SYS_DA850_PLL1_POSTDIV 1 -#define CONFIG_SYS_DA850_PLL1_PLLDIV1 0x8000 -#define CONFIG_SYS_DA850_PLL1_PLLDIV2 0x8001 -#define CONFIG_SYS_DA850_PLL1_PLLDIV3 0x8002 #define CONFIG_SYS_DA850_PLL0_PLLM 24 #define CONFIG_SYS_DA850_PLL1_PLLM 21 @@ -137,24 +115,18 @@ * Serial Driver info */ -#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_DIRECT_NOR_BOOT) +#if !CONFIG_IS_ENABLED(DM_SERIAL) #define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE -4 /* NS16550 register size */ #define CONFIG_SYS_NS16550_COM1 DAVINCI_UART2_BASE /* Base address of UART2 */ #endif #define CONFIG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID) -#define CONFIG_CONS_INDEX 1 /* use UART0 for console */ -#define CONFIG_SPI #define CONFIG_SYS_SPI_CLK clk_get(DAVINCI_SPI1_CLKID) #ifdef CONFIG_SPL_BUILD #define CONFIG_SYS_SPI_BASE DAVINCI_SPI1_BASE -#define CONFIG_SF_DEFAULT_SPEED 30000000 -#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED #endif #ifdef CONFIG_USE_SPIFLASH -#define CONFIG_SPL_SPI_LOAD #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8000 #define CONFIG_SYS_SPI_U_BOOT_SIZE 0x40000 #endif @@ -163,17 +135,18 @@ * I2C Configuration */ #ifndef CONFIG_SPL_BUILD -#define CONFIG_SYS_I2C_DAVINCI #define CONFIG_SYS_I2C_EXPANDER_ADDR 0x20 #endif /* * Flash & Environment */ -#ifdef CONFIG_USE_NAND -#define CONFIG_NAND_DAVINCI +#ifdef CONFIG_NAND +#ifdef CONFIG_ENV_IS_IN_NAND #define CONFIG_ENV_OFFSET 0x0 /* Block 0--not used by bootcode */ #define CONFIG_ENV_SIZE (128 << 10) +#define CONFIG_ENV_SECT_SIZE (128 << 10) +#endif #define CONFIG_SYS_NAND_USE_FLASH_BBT #define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST #define CONFIG_SYS_NAND_PAGE_2K @@ -187,8 +160,7 @@ #define CONFIG_SYS_NAND_5_ADDR_CYCLE #define CONFIG_SYS_NAND_PAGE_SIZE (2 << 10) #define CONFIG_SYS_NAND_BLOCK_SIZE (128 << 10) -#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x28000 -#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x60000 +#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x40000 #define CONFIG_SYS_NAND_U_BOOT_DST 0xc1080000 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST #define CONFIG_SYS_NAND_U_BOOT_RELOC_SP (CONFIG_SYS_NAND_U_BOOT_DST - \ @@ -216,17 +188,12 @@ * Network & Ethernet Configuration */ #ifdef CONFIG_DRIVER_TI_EMAC -#define CONFIG_MII -#define CONFIG_BOOTP_DNS #define CONFIG_BOOTP_DNS2 #define CONFIG_BOOTP_SEND_HOSTNAME #define CONFIG_NET_RETRY_COUNT 10 #endif #ifdef CONFIG_USE_NOR -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_PROTECTION #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of flash banks */ #define CONFIG_SYS_FLASH_SECT_SZ (128 << 10) /* 128KB */ #define CONFIG_ENV_OFFSET (CONFIG_SYS_FLASH_SECT_SZ * 3) @@ -239,27 +206,23 @@ #endif #ifdef CONFIG_USE_SPIFLASH +#ifdef CONFIG_ENV_IS_IN_SPI_FLASH #define CONFIG_ENV_SIZE (64 << 10) #define CONFIG_ENV_OFFSET (512 << 10) -#define CONFIG_ENV_SECT_SIZE (64 << 10) +#define CONFIG_ENV_SECT_SIZE (64 << 10) +#endif #ifdef CONFIG_SPL_BUILD #undef CONFIG_SPI_FLASH_MTD #endif -#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ -#define CONFIG_MTD_PARTITIONS /* required for UBI partition support */ #endif /* * U-Boot general configuration */ -#define CONFIG_MISC_INIT_R #define CONFIG_BOOTFILE "uImage" /* Boot file name */ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */ #define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x700000) -#define CONFIG_AUTO_COMPLETE -#define CONFIG_CMDLINE_EDITING -#define CONFIG_SYS_LONGHELP #define CONFIG_MX_CYCLIC /* @@ -298,12 +261,7 @@ #define CONFIG_CLOCKS #endif -#ifdef CONFIG_USE_NAND -#define CONFIG_MTD_DEVICE -#define CONFIG_MTD_PARTITIONS -#endif - -#if !defined(CONFIG_USE_NAND) && \ +#if !defined(CONFIG_NAND) && \ !defined(CONFIG_USE_NOR) && \ !defined(CONFIG_USE_SPIFLASH) #define CONFIG_ENV_SIZE (16 << 10) @@ -311,21 +269,15 @@ #ifndef CONFIG_DIRECT_NOR_BOOT /* defines for SPL */ -#define CONFIG_SPL_FRAMEWORK #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE - \ CONFIG_SYS_MALLOC_LEN) #define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN -#define CONFIG_SPL_SPI_LOAD #define CONFIG_SPL_STACK 0x8001ff00 -#define CONFIG_SPL_TEXT_BASE 0x80000000 #define CONFIG_SPL_MAX_FOOTPRINT 32768 #define CONFIG_SPL_PAD_TO 32768 #endif /* Load U-Boot Image From MMC */ -#ifdef CONFIG_SPL_MMC_LOAD -#undef CONFIG_SPL_SPI_LOAD -#endif /* additions for new relocation code, must added to all boards */ #define CONFIG_SYS_SDRAM_BASE 0xc0000000