X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fda850evm.h;h=41f0813a01982c5d3030996113cec3f7daccbfdc;hb=e4b91f085d4259f187052ff724c80af38fc11b18;hp=94848f5128b05c6a58c48f45e4fef8ed564bc7e1;hpb=cf5eebeb18f7790d5030eb94f51fca0ebcd6e406;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index 94848f5..41f0813 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -19,14 +19,6 @@ #endif /* -* Disable DM_* for SPL build and can be re-enabled after adding -* DM support in SPL -*/ -#ifdef CONFIG_SPL_BUILD -#undef CONFIG_DM_I2C -#undef CONFIG_DM_I2C_COMPAT -#endif -/* * SoC Configuration */ #define CONFIG_SYS_EXCEPTION_VECTORS_HIGH @@ -34,10 +26,9 @@ #define CONFIG_SYS_OSCIN_FREQ 24000000 #define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE #define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID) -#define CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_SKIP_LOWLEVEL_INIT_ONLY #ifdef CONFIG_DIRECT_NOR_BOOT -#define CONFIG_ARCH_CPU_INIT #define CONFIG_SYS_DV_NOR_BOOT_CFG (0x11) #endif @@ -114,20 +105,11 @@ /* * Serial Driver info */ - -#if !CONFIG_IS_ENABLED(DM_SERIAL) -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_COM1 DAVINCI_UART2_BASE /* Base address of UART2 */ -#endif #define CONFIG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID) #define CONFIG_SYS_SPI_CLK clk_get(DAVINCI_SPI1_CLKID) -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_SPI_BASE DAVINCI_SPI1_BASE -#endif #ifdef CONFIG_USE_SPIFLASH -#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8000 #define CONFIG_SYS_SPI_U_BOOT_SIZE 0x40000 #endif @@ -147,7 +129,6 @@ #define CONFIG_ENV_SIZE (128 << 10) #define CONFIG_ENV_SECT_SIZE (128 << 10) #endif -#define CONFIG_SYS_NAND_USE_FLASH_BBT #define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST #define CONFIG_SYS_NAND_PAGE_2K #define CONFIG_SYS_NAND_CS 3 @@ -182,6 +163,10 @@ #define CONFIG_SPL_NAND_DRIVERS #define CONFIG_SPL_NAND_ECC #define CONFIG_SPL_NAND_LOAD + +#ifndef CONFIG_SPL_BUILD +#define CONFIG_SYS_NAND_SELF_INIT +#endif #endif /* @@ -196,7 +181,7 @@ #ifdef CONFIG_USE_NOR #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of flash banks */ #define CONFIG_SYS_FLASH_SECT_SZ (128 << 10) /* 128KB */ -#define CONFIG_ENV_OFFSET (CONFIG_SYS_FLASH_SECT_SZ * 3) +#define CONFIG_ENV_OFFSET (SZ_1M) #define CONFIG_ENV_SIZE (10 << 10) /* 10KB */ #define CONFIG_SYS_FLASH_BASE DAVINCI_ASYNC_EMIF_DATA_CE2_BASE #define PHYS_FLASH_SIZE (8 << 20) /* Flash size 8MB */ @@ -223,7 +208,6 @@ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */ #define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x700000) -#define CONFIG_MX_CYCLIC /* * Linux Information @@ -267,13 +251,16 @@ #define CONFIG_ENV_SIZE (16 << 10) #endif +/* USB Configs */ +#define CONFIG_USB_OHCI_NEW +#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15 + #ifndef CONFIG_DIRECT_NOR_BOOT /* defines for SPL */ #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE - \ CONFIG_SYS_MALLOC_LEN) #define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN #define CONFIG_SPL_STACK 0x8001ff00 -#define CONFIG_SPL_TEXT_BASE 0x80000000 #define CONFIG_SPL_MAX_FOOTPRINT 32768 #define CONFIG_SPL_PAD_TO 32768 #endif