X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fda850evm.h;h=29d4b80ec62295d8e8ecfeba1c35836f0fa3ddf1;hb=8ccf98b1cfd2811e3121c719e294bdd8ebab1c45;hp=3ca596515013a30405cd2b356e56eb98aa60941d;hpb=c4cb6e64bf068eaa1f7c96cb37da7ae6d40bbbff;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h
index 3ca5965..29d4b80 100644
--- a/include/configs/da850evm.h
+++ b/include/configs/da850evm.h
@@ -1,11 +1,10 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
  *
  * Based on davinci_dvevm.h. Original Copyrights follow:
  *
  * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #ifndef __CONFIG_H
@@ -14,7 +13,6 @@
 /*
  * Board
  */
-#define CONFIG_DRIVER_TI_EMAC
 /* check if direct NOR boot config is used */
 #ifndef CONFIG_DIRECT_NOR_BOOT
 #define CONFIG_USE_SPIFLASH
@@ -33,9 +31,6 @@
 /*
  * SoC Configuration
  */
-#define CONFIG_MACH_DAVINCI_DA850_EVM
-#define CONFIG_SOC_DA8XX		/* TI DA8xx SoC */
-#define CONFIG_SOC_DA850		/* TI DA850 SoC */
 #define CONFIG_SYS_EXCEPTION_VECTORS_HIGH
 #define CONFIG_SYS_CLK_FREQ		clk_get(DAVINCI_ARM_CLKID)
 #define CONFIG_SYS_OSCIN_FREQ		24000000
@@ -44,12 +39,7 @@
 
 #ifdef CONFIG_DIRECT_NOR_BOOT
 #define CONFIG_ARCH_CPU_INIT
-#define CONFIG_DA8XX_GPIO
-#define CONFIG_SYS_TEXT_BASE		0x60000000
 #define CONFIG_SYS_DV_NOR_BOOT_CFG	(0x11)
-#define CONFIG_DA850_LOWLEVEL
-#else
-#define CONFIG_SYS_TEXT_BASE		0xc1080000
 #endif
 
 /*
@@ -66,8 +56,6 @@
 /* memtest will be run on 16MB */
 #define CONFIG_SYS_MEMTEST_END 	(PHYS_SDRAM_1 + 0x2000000 + 16*1024*1024)
 
-#define CONFIG_NR_DRAM_BANKS	1 /* we have 1 bank of DRAM */
-
 #define CONFIG_SYS_DA850_SYSCFG_SUSPSRC (	\
 	DAVINCI_SYSCFG_SUSPSRC_TIMER0 |		\
 	DAVINCI_SYSCFG_SUSPSRC_SPI1 |		\
@@ -78,20 +66,6 @@
 /*
  * PLL configuration
  */
-#define CONFIG_SYS_DV_CLKMODE          0
-#define CONFIG_SYS_DA850_PLL0_POSTDIV  1
-#define CONFIG_SYS_DA850_PLL0_PLLDIV1  0x8000
-#define CONFIG_SYS_DA850_PLL0_PLLDIV2  0x8001
-#define CONFIG_SYS_DA850_PLL0_PLLDIV3  0x8002
-#define CONFIG_SYS_DA850_PLL0_PLLDIV4  0x8003
-#define CONFIG_SYS_DA850_PLL0_PLLDIV5  0x8002
-#define CONFIG_SYS_DA850_PLL0_PLLDIV6  CONFIG_SYS_DA850_PLL0_PLLDIV1
-#define CONFIG_SYS_DA850_PLL0_PLLDIV7  0x8005
-
-#define CONFIG_SYS_DA850_PLL1_POSTDIV  1
-#define CONFIG_SYS_DA850_PLL1_PLLDIV1  0x8000
-#define CONFIG_SYS_DA850_PLL1_PLLDIV2  0x8001
-#define CONFIG_SYS_DA850_PLL1_PLLDIV3  0x8002
 
 #define CONFIG_SYS_DA850_PLL0_PLLM     24
 #define CONFIG_SYS_DA850_PLL1_PLLM     21
@@ -147,10 +121,7 @@
 #define CONFIG_SYS_NS16550_COM1	DAVINCI_UART2_BASE /* Base address of UART2 */
 #endif
 #define CONFIG_SYS_NS16550_CLK	clk_get(DAVINCI_UART2_CLKID)
-#define CONFIG_CONS_INDEX	1		/* use UART0 for console */
 
-#define CONFIG_SPI
-#define CONFIG_DAVINCI_SPI
 #define CONFIG_SYS_SPI_CLK		clk_get(DAVINCI_SPI1_CLKID)
 #ifdef CONFIG_SPL_BUILD
 #define CONFIG_SYS_SPI_BASE		DAVINCI_SPI1_BASE
@@ -159,7 +130,6 @@
 #endif
 
 #ifdef CONFIG_USE_SPIFLASH
-#define CONFIG_SPL_SPI_LOAD
 #define CONFIG_SYS_SPI_U_BOOT_OFFS	0x8000
 #define CONFIG_SYS_SPI_U_BOOT_SIZE	0x40000
 #endif
@@ -175,8 +145,7 @@
 /*
  * Flash & Environment
  */
-#ifdef CONFIG_USE_NAND
-#define CONFIG_NAND_DAVINCI
+#ifdef CONFIG_NAND
 #define CONFIG_ENV_OFFSET		0x0 /* Block 0--not used by bootcode */
 #define CONFIG_ENV_SIZE			(128 << 10)
 #define	CONFIG_SYS_NAND_USE_FLASH_BBT
@@ -221,8 +190,6 @@
  * Network & Ethernet Configuration
  */
 #ifdef CONFIG_DRIVER_TI_EMAC
-#define CONFIG_MII
-#define CONFIG_BOOTP_DNS
 #define CONFIG_BOOTP_DNS2
 #define CONFIG_BOOTP_SEND_HOSTNAME
 #define CONFIG_NET_RETRY_COUNT	10
@@ -250,21 +217,15 @@
 #ifdef CONFIG_SPL_BUILD
 #undef CONFIG_SPI_FLASH_MTD
 #endif
-#define CONFIG_MTD_DEVICE		/* needed for mtdparts commands */
-#define CONFIG_MTD_PARTITIONS		/* required for UBI partition support */
 #endif
 
 /*
  * U-Boot general configuration
  */
-#define CONFIG_MISC_INIT_R
 #define CONFIG_BOOTFILE		"uImage" /* Boot file name */
 #define CONFIG_SYS_CBSIZE	1024 /* Console I/O Buffer Size	*/
 #define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */
 #define CONFIG_SYS_LOAD_ADDR	(PHYS_SDRAM_1 + 0x700000)
-#define CONFIG_AUTO_COMPLETE
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_SYS_LONGHELP
 #define CONFIG_MX_CYCLIC
 
 /*
@@ -303,12 +264,7 @@
 #define CONFIG_CLOCKS
 #endif
 
-#ifdef CONFIG_USE_NAND
-#define CONFIG_MTD_DEVICE
-#define CONFIG_MTD_PARTITIONS
-#endif
-
-#if !defined(CONFIG_USE_NAND) && \
+#if !defined(CONFIG_NAND) && \
 	!defined(CONFIG_USE_NOR) && \
 	!defined(CONFIG_USE_SPIFLASH)
 #define CONFIG_ENV_SIZE		(16 << 10)
@@ -316,11 +272,9 @@
 
 #ifndef CONFIG_DIRECT_NOR_BOOT
 /* defines for SPL */
-#define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SYS_SPL_MALLOC_START	(CONFIG_SYS_TEXT_BASE - \
 						CONFIG_SYS_MALLOC_LEN)
 #define CONFIG_SYS_SPL_MALLOC_SIZE	CONFIG_SYS_MALLOC_LEN
-#define CONFIG_SPL_SPI_LOAD
 #define CONFIG_SPL_STACK	0x8001ff00
 #define CONFIG_SPL_TEXT_BASE	0x80000000
 #define CONFIG_SPL_MAX_FOOTPRINT	32768
@@ -328,9 +282,6 @@
 #endif
 
 /* Load U-Boot Image From MMC */
-#ifdef CONFIG_SPL_MMC_LOAD
-#undef CONFIG_SPL_SPI_LOAD
-#endif
 
 /* additions for new relocation code, must added to all boards */
 #define CONFIG_SYS_SDRAM_BASE		0xc0000000