X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fda850evm.h;h=0f41748093f75a9a30629974d1387a1dbd37b2ed;hb=f9a48654ee70fbad29f487d074fd36a1548b4209;hp=b87b6b208b33b605325866bd8ca225c40234ffd4;hpb=000fc151150150c36c58f6d8e8d2e27d3b668a7d;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index b87b6b2..0f41748 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -13,10 +13,6 @@ /* * Board */ -/* check if direct NOR boot config is used */ -#ifndef CONFIG_DIRECT_NOR_BOOT -#define CONFIG_USE_SPIFLASH -#endif /* * SoC Configuration @@ -28,8 +24,7 @@ #define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID) #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY -#ifdef CONFIG_DIRECT_NOR_BOOT -#define CONFIG_ARCH_CPU_INIT +#ifdef CONFIG_MTD_NOR_FLASH #define CONFIG_SYS_DV_NOR_BOOT_CFG (0x11) #endif @@ -43,10 +38,8 @@ #define CONFIG_SPL_BSS_START_ADDR DAVINCI_DDR_EMIF_DATA_BASE #define CONFIG_SPL_BSS_MAX_SIZE 0x1080000 /* memtest start addr */ -#define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM_1 + 0x2000000) /* memtest will be run on 16MB */ -#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + 0x2000000 + 16*1024*1024) #define CONFIG_SYS_DA850_SYSCFG_SUSPSRC ( \ DAVINCI_SYSCFG_SUSPSRC_TIMER0 | \ @@ -110,11 +103,6 @@ #define CONFIG_SYS_SPI_CLK clk_get(DAVINCI_SPI1_CLKID) -#ifdef CONFIG_USE_SPIFLASH -#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8000 -#define CONFIG_SYS_SPI_U_BOOT_SIZE 0x40000 -#endif - /* * I2C Configuration */ @@ -125,13 +113,7 @@ /* * Flash & Environment */ -#ifdef CONFIG_NAND -#ifdef CONFIG_ENV_IS_IN_NAND -#define CONFIG_ENV_OFFSET 0x0 /* Block 0--not used by bootcode */ -#define CONFIG_ENV_SIZE (128 << 10) -#define CONFIG_ENV_SECT_SIZE (128 << 10) -#endif -#define CONFIG_SYS_NAND_USE_FLASH_BBT +#ifdef CONFIG_MTD_RAW_NAND #define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST #define CONFIG_SYS_NAND_PAGE_2K #define CONFIG_SYS_NAND_CS 3 @@ -162,9 +144,6 @@ #define CONFIG_SYS_NAND_ECCSIZE 512 #define CONFIG_SYS_NAND_ECCBYTES 10 #define CONFIG_SYS_NAND_OOBSIZE 64 -#define CONFIG_SPL_NAND_BASE -#define CONFIG_SPL_NAND_DRIVERS -#define CONFIG_SPL_NAND_ECC #define CONFIG_SPL_NAND_LOAD #ifndef CONFIG_SPL_BUILD @@ -176,32 +155,16 @@ * Network & Ethernet Configuration */ #ifdef CONFIG_DRIVER_TI_EMAC -#define CONFIG_BOOTP_DNS2 -#define CONFIG_BOOTP_SEND_HOSTNAME #define CONFIG_NET_RETRY_COUNT 10 #endif -#ifdef CONFIG_USE_NOR +#ifdef CONFIG_MTD_NOR_FLASH #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of flash banks */ #define CONFIG_SYS_FLASH_SECT_SZ (128 << 10) /* 128KB */ -#define CONFIG_ENV_OFFSET (SZ_1M) -#define CONFIG_ENV_SIZE (10 << 10) /* 10KB */ #define CONFIG_SYS_FLASH_BASE DAVINCI_ASYNC_EMIF_DATA_CE2_BASE #define PHYS_FLASH_SIZE (8 << 20) /* Flash size 8MB */ #define CONFIG_SYS_MAX_FLASH_SECT ((PHYS_FLASH_SIZE/CONFIG_SYS_FLASH_SECT_SZ)\ + 3) -#define CONFIG_ENV_SECT_SIZE CONFIG_SYS_FLASH_SECT_SZ -#endif - -#ifdef CONFIG_USE_SPIFLASH -#ifdef CONFIG_ENV_IS_IN_SPI_FLASH -#define CONFIG_ENV_SIZE (64 << 10) -#define CONFIG_ENV_OFFSET (512 << 10) -#define CONFIG_ENV_SECT_SIZE (64 << 10) -#endif -#ifdef CONFIG_SPL_BUILD -#undef CONFIG_SPI_FLASH_MTD -#endif #endif /* @@ -211,7 +174,6 @@ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */ #define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x700000) -#define CONFIG_MX_CYCLIC /* * Linux Information @@ -249,17 +211,11 @@ #define CONFIG_CLOCKS #endif -#if !defined(CONFIG_NAND) && \ - !defined(CONFIG_USE_NOR) && \ - !defined(CONFIG_USE_SPIFLASH) -#define CONFIG_ENV_SIZE (16 << 10) -#endif - /* USB Configs */ #define CONFIG_USB_OHCI_NEW #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15 -#ifndef CONFIG_DIRECT_NOR_BOOT +#ifdef CONFIG_SPL_BUILD /* defines for SPL */ #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE - \ CONFIG_SYS_MALLOC_LEN) @@ -274,12 +230,12 @@ /* additions for new relocation code, must added to all boards */ #define CONFIG_SYS_SDRAM_BASE 0xc0000000 -#ifdef CONFIG_DIRECT_NOR_BOOT +#ifdef CONFIG_MTD_NOR_FLASH #define CONFIG_SYS_INIT_SP_ADDR 0x8001ff00 #else #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - /* Fix this */ \ GENERATED_GBL_DATA_SIZE) -#endif /* CONFIG_DIRECT_NOR_BOOT */ +#endif /* CONFIG_MTD_NOR_FLASH */ #include