X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fda830evm.h;h=6ac25d2b9c11e7781da0f819ce73d31855b0dfdd;hb=544aa66a6695790227613bf32bdf672143d5a1ad;hp=65747fba508768c27b192e6024a62b3967e71a72;hpb=3a4e43921d2599453ea87c623099e5f347c9e54a;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/da830evm.h b/include/configs/da830evm.h index 65747fb..6ac25d2 100644 --- a/include/configs/da830evm.h +++ b/include/configs/da830evm.h @@ -27,6 +27,8 @@ /* * Board */ +#define CONFIG_DRIVER_TI_EMAC +#define CONFIG_USE_SPIFLASH /* * SoC Configuration @@ -40,17 +42,16 @@ #define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID) #define CONFIG_SYS_HZ 1000 #define CONFIG_SKIP_LOWLEVEL_INIT -#define CONFIG_SKIP_RELOCATE_UBOOT /* to a proper address, init done */ +#define CONFIG_SYS_TEXT_BASE 0xc1080000 /* * Memory Info */ #define CONFIG_SYS_MALLOC_LEN (0x10000 + 1*1024*1024) /* malloc() len */ -#define CONFIG_SYS_GBL_DATA_SIZE 128 /* reserved for initial data */ -#define PHYS_SDRAM_1 DAVINCI_DDR_EMIF_DATA_BASE /* DDR Start */ -#define PHYS_SDRAM_1_SIZE (64 << 20) /* SDRAM size 64MB */ -#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1 /* memtest start addr */ -#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + 16*1024*1024) /* 16MB test */ +#define PHYS_SDRAM_1 0xc0000000 /* SDRAM Start */ +#define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM_1 + 0x2000000) +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \ + (32 << 20)) #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ #define CONFIG_STACKSIZE (256*1024) /* regular stack */ @@ -92,7 +93,6 @@ #define CONFIG_BOOTP_DNS2 #define CONFIG_BOOTP_SEND_HOSTNAME #define CONFIG_NET_RETRY_COUNT 10 -#define CONFIG_NET_MULTI #endif /* @@ -104,8 +104,10 @@ #define CONFIG_SYS_NO_FLASH #define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */ #define CONFIG_ENV_OFFSET (512 << 10) -#define CONFIG_ENV_SIZE (512 << 10) +#define CONFIG_ENV_SIZE (10 << 10) /* 10KB */ +#define CONFIG_SYS_NAND_USE_FLASH_BBT #define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST +#define CONFIG_SYS_NAND_PAGE_2K #define CONFIG_SYS_NAND_CS 3 #define CONFIG_SYS_NAND_BASE DAVINCI_ASYNC_EMIF_DATA_CE3_BASE #define CONFIG_SYS_NAND_PAGE_2K @@ -114,7 +116,6 @@ #define CONFIG_SYS_ALE_MASK 0x8 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ #define NAND_MAX_CHIPS 1 -#define DEF_BOOTM "" #endif #ifdef CONFIG_USE_NOR @@ -146,8 +147,8 @@ #define CONFIG_DAVINCI_SPI #define CONFIG_SYS_SPI_BASE DAVINCI_SPI0_BASE #define CONFIG_SYS_SPI_CLK clk_get(DAVINCI_SPI0_CLKID) -#define CONFIG_SF_DEFAULT_SPEED 50000000 -#define CONFIG_SYS_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED +#define CONFIG_SF_DEFAULT_SPEED 30000000 +#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED #endif /* @@ -163,12 +164,12 @@ #undef CONFIG_MISC_INIT_R #undef CONFIG_BOOTDELAY #define CONFIG_BOOTFILE "uImage" /* Boot file name */ -#define CONFIG_SYS_PROMPT "DA830-evm > " /* Command Prompt */ +#define CONFIG_SYS_PROMPT "U-Boot > " /* Command Prompt */ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */ -#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_MEMTEST_START + 0x700000) +#define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x700000) #define CONFIG_VERSION_VARIABLE #define CONFIG_AUTO_COMPLETE /* Won't work with hush so far, may be later */ #define CONFIG_SYS_HUSH_PARSER @@ -181,7 +182,7 @@ /* * Linux Information */ -#define LINUX_BOOT_PARAM_ADDR (CONFIG_SYS_MEMTEST_START + 0x100) +#define LINUX_BOOT_PARAM_ADDR (PHYS_SDRAM_1 + 0x100) #define CONFIG_CMDLINE_TAG #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_BOOTARGS "mem=32M console=ttyS2,115200n8 root=/dev/mtdblock/2 rw noinitrd ip=dhcp" @@ -202,7 +203,6 @@ #define CONFIG_CMD_MEMORY #undef CONFIG_CMD_FPGA #undef CONFIG_CMD_SETGETDCR -#define CONFIG_CMD_EEPROM #ifndef CONFIG_DRIVER_TI_EMAC #undef CONFIG_CMD_NET @@ -224,6 +224,7 @@ #undef CONFIG_CMD_IMLS #undef CONFIG_CMD_FLASH #define CONFIG_CMD_SPI +#define CONFIG_CMD_SF #define CONFIG_CMD_SAVEENV #endif @@ -279,4 +280,11 @@ "mtdparts=davinci_nand.1:" PART_BOOT PART_PARAMS PART_KERNEL PART_REST #endif +#define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) /* max size from SPRS586*/ + +/* additions for new relocation code, must be added to all boards */ +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE) + #endif /* __CONFIG_H */