X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fcyrus.h;h=435929723b372c5d96efa5dc71b899d97b412182;hb=a1dc980d88a5c9c2b99251c8d8299b0c8948de73;hp=da103a437d5b120da1ddcf16b3d1cb0572f1e1b2;hpb=af27382e2d6f7b4966e6932c9820939259498c1b;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/cyrus.h b/include/configs/cyrus.h index da103a4..4359297 100644 --- a/include/configs/cyrus.h +++ b/include/configs/cyrus.h @@ -9,16 +9,15 @@ #define CONFIG_CYRUS -#if !defined(CONFIG_PPC_P5020) && !defined(CONFIG_PPC_P5040) +#if !defined(CONFIG_ARCH_P5020) && !defined(CONFIG_ARCH_P5040) #error Must call Cyrus CONFIG with a specific CPU enabled. #endif -#define CONFIG_MMC #define CONFIG_SDCARD #define CONFIG_FSL_SATA_V2 #define CONFIG_PCIE3 #define CONFIG_PCIE4 -#ifdef CONFIG_PPC_P5020 +#ifdef CONFIG_ARCH_P5020 #define CONFIG_SYS_FSL_RAID_ENGINE #define CONFIG_SYS_DPAA_RMAN #endif @@ -30,18 +29,15 @@ #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc #define CONFIG_SYS_FSL_PBL_PBI board/varisys/cyrus/pbi.cfg -#if defined(CONFIG_PPC_P5020) +#if defined(CONFIG_ARCH_P5020) #define CONFIG_SYS_CLK_FREQ 133000000 #define CONFIG_SYS_FSL_PBL_RCW board/varisys/cyrus/rcw_p5020_v2.cfg -#elif defined(CONFIG_PPC_P5040) +#elif defined(CONFIG_ARCH_P5040) #define CONFIG_SYS_CLK_FREQ 100000000 #define CONFIG_SYS_FSL_PBL_RCW board/varisys/cyrus/rcw_p5040.cfg #endif /* High Level Configuration Options */ -#define CONFIG_BOOKE -#define CONFIG_E500 /* BOOKE e500 family */ -#define CONFIG_E500MC /* BOOKE e500mc family */ #define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */ #define CONFIG_MP /* support multiple processors */ @@ -52,19 +48,14 @@ #endif #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ -#define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS -#define CONFIG_FSL_ELBC /* Has Enhanced localbus controller */ +#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_PCIE2 /* PCIE controller 2 */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ -#define CONFIG_FSL_LAW /* Use common FSL init code */ - #define CONFIG_ENV_OVERWRITE -#define CONFIG_SYS_NO_FLASH - #if defined(CONFIG_SDCARD) #define CONFIG_SYS_EXTRA_ENV_RELOC #define CONFIG_ENV_IS_IN_MMC @@ -129,7 +120,6 @@ #define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR) #define CONFIG_DDR_SPD -#define CONFIG_SYS_FSL_DDR3 #define CONFIG_SYS_SPD_BUS_NUM 1 #define SPD_EEPROM_ADDRESS1 0x51 @@ -171,7 +161,6 @@ #define CONFIG_SYS_RAMBOOT #endif -#define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_BOARD_EARLY_INIT_R /* call board_early_init_r function */ #define CONFIG_MISC_INIT_R @@ -250,7 +239,6 @@ #define CONFIG_SYS_I2C_MAC2_CHIP_ADDR 0x50 #define CONFIG_SYS_I2C_MAC2_DATA_ADDR 0xfa -#define CONFIG_CMD_DATE 1 #define CONFIG_RTC_MCP79411 1 #define CONFIG_SYS_RTC_BUS_NUM 3 #define CONFIG_SYS_I2C_RTC_ADDR 0x6f @@ -385,11 +373,9 @@ #ifdef CONFIG_PCI #define CONFIG_PCI_INDIRECT_BRIDGE -#define CONFIG_PCI_PNP /* do pci plug-and-play */ #define CONFIG_NET_MULTI #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ -#define CONFIG_DOS_PARTITION #endif /* CONFIG_PCI */ /* SATA */ @@ -407,7 +393,6 @@ #define CONFIG_LBA48 #define CONFIG_CMD_SATA -#define CONFIG_DOS_PARTITION #endif #ifdef CONFIG_FMAN_ENET @@ -441,7 +426,6 @@ #define CONFIG_HAS_FSL_MPH_USB #if defined(CONFIG_HAS_FSL_DR_USB) || defined(CONFIG_HAS_FSL_MPH_USB) -#define CONFIG_USB_EHCI #define CONFIG_USB_EHCI_FSL #define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_EHCI_IS_TDI @@ -453,8 +437,6 @@ #define CONFIG_FSL_ESDHC #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR #define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT -#define CONFIG_GENERIC_MMC -#define CONFIG_DOS_PARTITION #endif /* @@ -495,9 +477,6 @@ /* default location for tftp and bootm */ #define CONFIG_LOADADDR 1000000 - -#define CONFIG_BAUDRATE 115200 - #define __USB_PHY_TYPE utmi #define CONFIG_EXTRA_ENV_SETTINGS \