X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fcsb472.h;h=aed5fa6a453e806759cfdf933c9fc525bd5f5bd7;hb=412665b46134f93464c09405e02f08ac9c62526d;hp=af382526fa2ae5ce7f5a2010548912f0a0fcc9b3;hpb=f61f1e150c84f5b9347fca79a4bc5f2286c545d2;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/csb472.h b/include/configs/csb472.h
index af38252..aed5fa6 100644
--- a/include/configs/csb472.h
+++ b/include/configs/csb472.h
@@ -40,6 +40,8 @@
 #define CONFIG_LAST_STAGE_INIT	1	/* Call last_stage_init()	*/
 #define CONFIG_SYS_CLK_FREQ     25000000 /* external frequency to pll   */
 
+#define	CONFIG_SYS_TEXT_BASE	0xFFFC0000
+
 /*
  * OS Bootstrap configuration
  *
@@ -120,9 +122,6 @@
  *
  */
 #undef	CONFIG_SYS_HUSH_PARSER			/* use "hush" command parser */
-#ifdef	CONFIG_SYS_HUSH_PARSER
-#define	CONFIG_SYS_PROMPT_HUSH_PS2	"> "	/* hush shell secondary prompt */
-#endif
 
 #define CONFIG_SYS_LONGHELP			/* undef to save memory	*/
 #define CONFIG_SYS_PROMPT		"=> "	/* Monitor Command Prompt */
@@ -139,7 +138,6 @@
 #define CONFIG_SYS_MEMTEST_END		0x0C00000 /* 4 ... 12 MB in DRAM */
 
 #define	CONFIG_SYS_HZ			1000	/* decrementer freq: 1 ms ticks	*/
-#define CONFIG_SYS_CLKS_IN_HZ		1	/* everything, incl board info, in Hz */
 #define CONFIG_SYS_EXTBDINFO		1	/* To use extended board_info (bd_t) */
 #define CONFIG_SYS_LOAD_ADDR		0x100000 /* default load address */
 
@@ -160,8 +158,13 @@
  * UART configuration
  *
  */
+#define CONFIG_CONS_INDEX		1	/* Use UART0		*/
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	1
+#define CONFIG_SYS_NS16550_CLK		get_serial_clock()
+
 #undef CONFIG_SYS_EXT_SERIAL_CLOCK		/* use internal serial clock */
-#undef  CONFIG_SYS_IGNORE_405_UART_ERRATA_59	/* ignore ppc405gp errata #59 */
 #define CONFIG_SYS_BASE_BAUD		691200
 #define CONFIG_BAUDRATE		38400	/* Default baud rate */
 #define CONFIG_SYS_BAUDRATE_TABLE      \
@@ -172,6 +175,7 @@
  *
  */
 #define CONFIG_HARD_I2C		1	/* I2C with hardware support	*/
+#define CONFIG_PPC4XX_I2C		/* use PPC4xx driver		*/
 #define CONFIG_SYS_I2C_SPEED		100000	/* I2C speed			*/
 #define CONFIG_SYS_I2C_SLAVE		0x7F	/* I2C slave address		*/
 
@@ -179,6 +183,7 @@
  * MII PHY configuration
  *
  */
+#define CONFIG_PPC4xx_EMAC
 #define CONFIG_MII		1	/* MII PHY management		*/
 #define CONFIG_PHY_ADDR		0	/* PHY address			*/
 #define CONFIG_PHY_CMD_DELAY	40	/* PHY COMMAND delay		*/
@@ -243,7 +248,7 @@
 #define CONFIG_SYS_SDRAM_BASE		0x00000000
 #define CONFIG_SYS_FLASH_BASE		0xFF800000
 #define CONFIG_SYS_FLASH_SIZE		0x00800000
-#define CONFIG_SYS_MONITOR_BASE	TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_TEXT_BASE
 #define CONFIG_SYS_MONITOR_LEN		(256 * 1024) /* Reserve 256 KB for Monitor */
 #define CONFIG_SYS_MALLOC_LEN		(128 * 1024) /* Reserve 128 KB for malloc() */
 
@@ -283,9 +288,8 @@
  *
  */
 #define CONFIG_SYS_INIT_RAM_ADDR	CONFIG_SYS_OCM_DATA_ADDR /* inside of on-chip SRAM */
-#define CONFIG_SYS_INIT_RAM_END	CONFIG_SYS_OCM_DATA_SIZE /* End of used area in RAM */
-#define CONFIG_SYS_GBL_DATA_SIZE	128 /* byte size reserved for initial data */
-#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_RAM_SIZE	CONFIG_SYS_OCM_DATA_SIZE /* Size of used area in RAM */
+#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
 
 /*
@@ -294,13 +298,4 @@
  */
 #define CONFIG_I2CFAST		1	/* enable "i2cfast" env. setting     */
 
-/*
- * Internal Definitions
- *
- * Boot Flags
- *
- */
-#define BOOTFLAG_COLD		0x01	/* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM		0x02	/* Software reboot */
-
 #endif	/* __CONFIG_H */