X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fcsb226.h;h=505740c4d41e2302099170613366025a93f056ae;hb=22a9ea974bdf18e6adad5c4f80b1c60ef384690c;hp=d65c14a672a1fa2213c85feb007eeae53d144ddf;hpb=94a3312920b6f9b5da27309549fb73650718c10a;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/csb226.h b/include/configs/csb226.h
index d65c14a..505740c 100644
--- a/include/configs/csb226.h
+++ b/include/configs/csb226.h
@@ -42,6 +42,10 @@
 
 #undef CONFIG_USE_IRQ			/* we don't need IRQ/FIQ stuff      */
 					/* for timer/console/ethernet       */
+
+/* we will never enable dcache, because we have to setup MMU first */
+#define CONFIG_SYS_NO_DCACHE
+#define	CONFIG_SYS_TEXT_BASE	0x0
 /*
  * Hardware drivers
  */
@@ -49,6 +53,7 @@
 /*
  * select serial console configuration
  */
+#define CONFIG_PXA_SERIAL
 #define CONFIG_FFUART		1	/* we use FFUART on CSB226          */
 
 /* allow to overwrite serial and ethaddr */
@@ -112,7 +117,6 @@
  *
  */
 #define CONFIG_SYS_MALLOC_LEN		(128*1024)
-#define CONFIG_SYS_GBL_DATA_SIZE	128		/* size in bytes reserved for initial data */
 
 #define CONFIG_SYS_LONGHELP				/* undef to save memory         */
 #define CONFIG_SYS_PROMPT		"uboot> "	/* Monitor Command Prompt       */
@@ -124,8 +128,6 @@
 #define CONFIG_SYS_MEMTEST_START	0xa0400000      /* memtest works on     */
 #define CONFIG_SYS_MEMTEST_END         0xa0800000      /* 4 ... 8 MB in DRAM   */
 
-#undef  CONFIG_SYS_CLKS_IN_HZ          /* everything, incl board info, in Hz */
-
 #define CONFIG_SYS_LOAD_ADDR           0xa3000000	/* default load address */
 						/* RS: where is this documented? */
 						/* RS: is this where U-Boot is  */
@@ -147,9 +149,10 @@
 /*
  * Network chip
  */
-#define CONFIG_DRIVER_CS8900	1
-#define CS8900_BUS32		1
-#define CS8900_BASE		0x08000000
+#define CONFIG_NET_MULTI
+#define CONFIG_CS8900
+#define CONFIG_CS8900_BUS32
+#define CONFIG_CS8900_BASE	0x08000000
 
 /*
  * Stack sizes
@@ -177,6 +180,9 @@
 
 #define CONFIG_SYS_FLASH_BASE          PHYS_FLASH_1
 
+#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
+#define	CONFIG_SYS_INIT_SP_ADDR		(GENERATED_GBL_DATA_SIZE + PHYS_SDRAM_1)
+
 # if 0
 /* FIXME: switch to _documented_ registers */
 /*
@@ -451,6 +457,9 @@
 
 #define CONFIG_SYS_PSSR_VAL        0x20
 
+#define	CONFIG_SYS_CCCR			CCCR_L27|CCCR_M2|CCCR_N10
+#define	CONFIG_SYS_CKEN			0x0
+
 /*
  * Memory settings
  */
@@ -461,6 +470,8 @@
 #define CONFIG_SYS_MDCNFG_VAL          0x09a909a9
 #define CONFIG_SYS_MDREFR_VAL          0x038ff030
 #define CONFIG_SYS_MDMRS_VAL           0x00220022
+#define	CONFIG_SYS_FLYCNFG_VAL		0x00000000
+#define	CONFIG_SYS_SXCNFG_VAL		0x00000000
 
 /*
  * PCMCIA and CF Interfaces