X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fcpci5200.h;h=fffd1fe1fa7866c0896651ce307786f288ef4309;hb=776488eb88d0915945eeecfc1ad3e318979f9548;hp=711e348139836f9d2b3a2e6f4c44557fae034776;hpb=d9f2f5008c32c8373d68a4c8e14f50a469965a23;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/cpci5200.h b/include/configs/cpci5200.h
index 711e348..fffd1fe 100644
--- a/include/configs/cpci5200.h
+++ b/include/configs/cpci5200.h
@@ -50,10 +50,7 @@
 #define BOOTFLAG_COLD		0x01	/* Normal Power-On: Boot from FLASH  */
 #define BOOTFLAG_WARM		0x02	/* Software reboot	     */
 
-#define CFG_CACHELINE_SIZE	32	/* For MPC5xxx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
-#  define CFG_CACHELINE_SHIFT	5	/* log base 2 of the above value */
-#endif
+#define CONFIG_HIGH_BATS	1	/* High BATs supported 	  */
 
 /*
  * Serial console configuration
@@ -74,6 +71,7 @@
 #define CONFIG_PCI_PNP		1
 #endif
 #define CONFIG_PCI_SCAN_SHOW	1
+#define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE	1
 
 #define CONFIG_PCI_MEM_BUS	0x40000000
 #define CONFIG_PCI_MEM_PHYS	CONFIG_PCI_MEM_BUS
@@ -92,12 +90,6 @@
 #define CONFIG_NS8382X		1
 #endif
 
-#define ADD_PCI_CMD		CFG_CMD_PCI
-
-#else				/* MPC5100 */
-
-#define ADD_PCI_CMD		0	/* no CFG_CMD_PCI */
-
 #endif
 
 /* Partitions */
@@ -107,28 +99,35 @@
 /* USB */
 #if 0
 #define CONFIG_USB_OHCI
-#define ADD_USB_CMD		CFG_CMD_USB | CFG_CMD_FAT
 #define CONFIG_USB_STORAGE
-#else
-#define ADD_USB_CMD		0
 #endif
 
 /*
- * Supported commands
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
  */
-#define CONFIG_COMMANDS		(CONFIG_CMD_DFL	| \
-				 CFG_CMD_EEPROM	| \
-				 CFG_CMD_FAT	| \
-				 CFG_CMD_IDE	| \
-				 CFG_CMD_I2C	| \
-				 CFG_CMD_BSP	| \
-				 CFG_CMD_ELF	| \
-				 CFG_CMD_EXT2	| \
-				 CFG_CMD_DATE	| \
-				 ADD_PCI_CMD	  )
-
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+#include <config_cmd_default.h>
+
+#if defined(CONFIG_PCI)
+#define CONFIG_CMD_PCI
+#endif
+
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_BSP
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_EXT2
+#define CONFIG_CMD_DATE
 
 #if (TEXT_BASE == 0xFF000000)	/* Boot low with 16 MB Flash */
 #   define CFG_LOWBOOT		1
@@ -154,9 +153,9 @@
 	"netdev=eth0\0" \
 	"flash_vxworks0=run ata_vxworks_args;setenv loadaddr ff000000;bootvx\0" \
 	"flash_vxworks1=run ata_vxworks_args;setenv loadaddr ff200000:bootvx\0" \
-	"net_vxworks=phypower 1;sleep 2;tftp $(loadaddr) $(image);run vxworks_args;bootvx\0" \
-	"vxworks_args=setenv bootargs fec(0,0)$(host):$(image) h=$(serverip) e=$(ipaddr) g=$(gatewayip) u=$(user) $(pass) tn=$(target) s=$(script)\0" \
-	"ata_vxworks_args=setenv bootargs /ata0/vxWorks h=$(serverip) e=$(ipaddr) g=$(gatewayip) u=$(user) $(pass) tn=$(target) s=$(script) o=fec0 \0" \
+	"net_vxworks=phypower 1;sleep 2;tftp ${loadaddr} ${image};run vxworks_args;bootvx\0" \
+	"vxworks_args=setenv bootargs fec(0,0)${host}:${image} h=${serverip} e=${ipaddr} g=${gatewayip} u=${user} ${pass} tn=${target} s=${script}\0" \
+	"ata_vxworks_args=setenv bootargs /ata0/vxWorks h=${serverip} e=${ipaddr} g=${gatewayip} u=${user} ${pass} tn=${target} s=${script} o=fec0 \0" \
 	"loadaddr=01000000\0" \
 	"serverip=192.168.2.99\0" \
 	"gatewayip=10.0.0.79\0" \
@@ -179,7 +178,7 @@
 /*
  * IPB Bus clocking configuration.
  */
-#undef CFG_IPBSPEED_133		/* define for 133MHz speed */
+#undef CFG_IPBCLK_EQUALS_XLBCLK		/* define for 133MHz speed */
 #endif
 /*
  * I2C configuration
@@ -277,7 +276,7 @@
  */
 #define CFG_LONGHELP		/* undef to save memory	    */
 #define CFG_PROMPT		"=> "	/* Monitor Command Prompt   */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
 #define CFG_CBSIZE		1024	/* Console I/O Buffer Size  */
 #else
 #define CFG_CBSIZE		256	/* Console I/O Buffer Size  */
@@ -295,6 +294,11 @@
 
 #define CFG_VXWORKS_MAC_PTR	0x00000000	/* Pass Ethernet MAC to VxWorks */
 
+#define CFG_CACHELINE_SIZE	32	/* For MPC5xxx CPUs */
+#if defined(CONFIG_CMD_KGDB)
+#  define CFG_CACHELINE_SHIFT	5	/* log base 2 of the above value */
+#endif
+
 /*
  * Various low-level settings
  */