X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fcpci5200.h;h=ec926fd22d5f9c0294f1fd3bc38db8a591b38656;hb=6983951a612aeecd906521e31de83d7fae309950;hp=f7290d6eb4b3316c7d2079bcd90d0df2d91ea7ed;hpb=0020db3f0da61f3e2c8a459a87598e07594dc8ac;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/cpci5200.h b/include/configs/cpci5200.h index f7290d6..ec926fd 100644 --- a/include/configs/cpci5200.h +++ b/include/configs/cpci5200.h @@ -2,23 +2,7 @@ * (C) Copyright 2003-2004 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA + * SPDX-License-Identifier: GPL-2.0+ */ @@ -39,16 +23,16 @@ * (easy to change) */ -#define CONFIG_MPC5200 1 /* This is an MPC5xxx CPU */ -#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */ +#define CONFIG_MPC5200 1 /* This is an MPC5200 CPU */ #define CONFIG_ICECUBE 1 /* ... on IceCube board */ #define CONFIG_CPCI5200 1 /* ... on CPCI5200 board */ #define CONFIG_MPC5200_DDR 1 /* ... use DDR RAM */ -#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 /* Standard: boot high */ +#endif -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ +#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ #define CONFIG_HIGH_BATS 1 /* High BATs supported */ @@ -83,7 +67,6 @@ #define CONFIG_MII #if 0 /* test-only !!! */ -#define CONFIG_NET_MULTI 1 #define CONFIG_EEPRO100 1 #define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */ #define CONFIG_NS8382X 1 @@ -126,11 +109,11 @@ #define CONFIG_CMD_EXT2 #define CONFIG_CMD_DATE -#if (TEXT_BASE == 0xFF000000) /* Boot low with 16 MB Flash */ +#if (CONFIG_SYS_TEXT_BASE == 0xFF000000) /* Boot low with 16 MB Flash */ # define CONFIG_SYS_LOWBOOT 1 # define CONFIG_SYS_LOWBOOT16 1 #endif -#if (TEXT_BASE == 0xFF800000) /* Boot low with 8 MB Flash */ +#if (CONFIG_SYS_TEXT_BASE == 0xFF800000) /* Boot low with 8 MB Flash */ # define CONFIG_SYS_LOWBOOT 1 # define CONFIG_SYS_LOWBOOT08 1 #endif @@ -234,13 +217,12 @@ /* Use SRAM until RAM will be available */ #define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM -#define CONFIG_SYS_INIT_RAM_END MPC5XXX_SRAM_SIZE /* End of used area in DPRAM */ +#define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE /* Size of used area in DPRAM */ -#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) +#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) # define CONFIG_SYS_RAMBOOT 1 #endif @@ -270,7 +252,6 @@ * Miscellaneous configurable options */ #define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ #if defined(CONFIG_CMD_KGDB) #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ #else @@ -285,8 +266,6 @@ #define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */ -#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */ - #define CONFIG_SYS_VXWORKS_MAC_PTR 0x00000000 /* Pass Ethernet MAC to VxWorks */ #define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */