X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fcorvus.h;h=746475d45fecb4afa7b747783ff4e7b90db5b1e3;hb=067716bac59716b07f1ee70d9bf6e5528289bb45;hp=959e188d9ad162a51c39668183c317dc3348ffa2;hpb=1ad6364eeb4f578e423081d1748e8a3fdf1ab01d;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/corvus.h b/include/configs/corvus.h index 959e188..746475d 100644 --- a/include/configs/corvus.h +++ b/include/configs/corvus.h @@ -15,8 +15,7 @@ #define __CONFIG_H #include - -#define MACH_TYPE_CORVUS 2066 +#include /* * Warning: changing CONFIG_SYS_TEXT_BASE requires @@ -25,27 +24,21 @@ * hex number here! */ -#define CONFIG_SYS_TEXT_BASE 0x73f00000 +#define CONFIG_SYS_TEXT_BASE 0x72000000 -#define CONFIG_AT91_LEGACY #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ /* ARM asynchronous clock */ #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */ -#define CONFIG_AT91FAMILY - #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_INITRD_TAG -#define CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_SKIP_LOWLEVEL_INIT_ONLY #define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_DISPLAY_CPUINFO -#define CONFIG_CMD_BOOTZ -#define CONFIG_OF_LIBFDT - /* general purpose I/O */ #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ #define CONFIG_AT91_GPIO @@ -61,7 +54,6 @@ #define CONFIG_RED_LED AT91_PIN_PD31 /* this is the user1 led */ #define CONFIG_GREEN_LED AT91_PIN_PD0 /* this is the user2 led */ -#define CONFIG_BOOTDELAY 3 /* * BOOTP options @@ -74,17 +66,7 @@ /* * Command line configuration. */ -#include -#undef CONFIG_CMD_BDI -#undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_IMI -#undef CONFIG_CMD_IMLS -#undef CONFIG_CMD_LOADS - -#define CONFIG_CMD_PING -#define CONFIG_CMD_DHCP #define CONFIG_CMD_NAND -#define CONFIG_CMD_USB /* SDRAM */ #define CONFIG_NR_DRAM_BANKS 1 @@ -92,7 +74,7 @@ #define CONFIG_SYS_SDRAM_SIZE 0x08000000 #define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE) + (CONFIG_SYS_SDRAM_BASE + SZ_4K - GENERATED_GBL_DATA_SIZE) /* No NOR flash */ #define CONFIG_SYS_NO_FLASH @@ -109,11 +91,11 @@ #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC8 - #endif /* Ethernet */ #define CONFIG_MACB +#define CONFIG_PHYLIB #define CONFIG_RMII #define CONFIG_NET_RETRY_COUNT 20 #define CONFIG_AT91_WANTS_COMMON_PHY @@ -125,13 +107,24 @@ #define CONFIG_DOS_PARTITION #define CONFIG_USB_STORAGE -#define CONFIG_SYS_LOAD_ADDR 0x72000000 /* load address */ +/* USB DFU support */ +#define CONFIG_CMD_MTDPARTS +#define CONFIG_MTD_DEVICE +#define CONFIG_MTD_PARTITIONS + +/* DFU class support */ +#define CONFIG_USB_FUNCTION_DFU +#define CONFIG_DFU_NAND +#define CONFIG_SYS_DFU_DATA_BUF_SIZE (SZ_1M) +#define DFU_MANIFEST_POLL_TIMEOUT 25000 + +#define CONFIG_SYS_LOAD_ADDR ATMEL_BASE_CS6 /* bootstrap + u-boot + env in nandflash */ #define CONFIG_ENV_IS_IN_NAND #define CONFIG_ENV_OFFSET 0x100000 #define CONFIG_ENV_OFFSET_REDUND 0x180000 -#define CONFIG_ENV_SIZE 0x20000 +#define CONFIG_ENV_SIZE SZ_128K #define CONFIG_BOOTCOMMAND \ "nand read 0x70000000 0x200000 0x300000;" \ @@ -145,7 +138,6 @@ #define CONFIG_BAUDRATE 115200 -#define CONFIG_SYS_PROMPT "U-Boot> " #define CONFIG_SYS_CBSIZE 256 #define CONFIG_SYS_MAXARGS 16 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ @@ -153,12 +145,57 @@ #define CONFIG_SYS_LONGHELP #define CONFIG_CMDLINE_EDITING #define CONFIG_AUTO_COMPLETE -#define CONFIG_SYS_HUSH_PARSER /* * Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + \ - 128*1024, 0x1000) + SZ_4M, 0x1000) + +/* Defines for SPL */ +#define CONFIG_SPL_FRAMEWORK +#define CONFIG_SPL_TEXT_BASE 0x300000 +#define CONFIG_SPL_MAX_SIZE (12 * SZ_1K) +#define CONFIG_SPL_STACK (SZ_16K) + +#define CONFIG_SPL_BSS_START_ADDR CONFIG_SPL_MAX_SIZE +#define CONFIG_SPL_BSS_MAX_SIZE (SZ_2K) + +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_SERIAL_SUPPORT + +#define CONFIG_SPL_BOARD_INIT +#define CONFIG_SPL_GPIO_SUPPORT +#define CONFIG_SPL_NAND_SUPPORT +#define CONFIG_SPL_NAND_DRIVERS +#define CONFIG_SPL_NAND_BASE +#define CONFIG_SPL_NAND_ECC +#define CONFIG_SPL_NAND_RAW_ONLY +#define CONFIG_SPL_NAND_SOFTECC +#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000 +#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000 +#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_NAND_5_ADDR_CYCLE + +#define CONFIG_SYS_NAND_PAGE_SIZE SZ_2K +#define CONFIG_SYS_NAND_BLOCK_SIZE (SZ_128K) +#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ + CONFIG_SYS_NAND_PAGE_SIZE) +#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS +#define CONFIG_SYS_NAND_ECCSIZE 256 +#define CONFIG_SYS_NAND_ECCBYTES 3 +#define CONFIG_SYS_NAND_OOBSIZE 64 +#define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \ + 48, 49, 50, 51, 52, 53, 54, 55, \ + 56, 57, 58, 59, 60, 61, 62, 63, } + +#define CONFIG_SPL_ATMEL_SIZE +#define CONFIG_SYS_MASTER_CLOCK 132096000 +#define AT91_PLL_LOCK_TIMEOUT 1000000 +#define CONFIG_SYS_AT91_PLLA 0x20c73f03 +#define CONFIG_SYS_MCKR 0x1301 +#define CONFIG_SYS_MCKR_CSS 0x1302 #endif