X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fcorenet_ds.h;h=5e9de901d141e1f2b932a25ca195bf2e0bb60a8d;hb=243be8e296c53343eb21a6224f5329ff94778a4f;hp=454a30a040c4528c1af9e90729e4f08b747d31db;hpb=52eb2c79110151b9017a0829c4d44ee7b8e2ca04;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h
index 454a30a..5e9de90 100644
--- a/include/configs/corenet_ds.h
+++ b/include/configs/corenet_ds.h
@@ -1,5 +1,5 @@
 /*
- * Copyright 2009-2010 Freescale Semiconductor, Inc.
+ * Copyright 2009-2011 Freescale Semiconductor, Inc.
  *
  * See file CREDITS for list of people who contributed to this
  * project.
@@ -41,6 +41,10 @@
 #define CONFIG_SYS_TEXT_BASE	0xeff80000
 #endif
 
+#ifndef CONFIG_RESET_VECTOR_ADDRESS
+#define CONFIG_RESET_VECTOR_ADDRESS	0xeffffffc
+#endif
+
 #define CONFIG_SYS_FSL_CPC		/* Corenet Platform Cache */
 #define CONFIG_SYS_NUM_CPC		CONFIG_NUM_DDR_CONTROLLERS
 #define CONFIG_FSL_ELBC			/* Has Enhanced localbus controller */
@@ -50,8 +54,8 @@
 #define CONFIG_PCIE3			/* PCIE controler 3 */
 #define CONFIG_FSL_PCI_INIT		/* Use common FSL init code */
 #define CONFIG_SYS_PCI_64BIT		/* enable 64-bit PCI resources */
-#define CONFIG_SYS_HAS_SERDES		/* has SERDES */
 
+#define CONFIG_SYS_SRIO
 #define CONFIG_SRIO1			/* SRIO port 1 */
 #define CONFIG_SRIO2			/* SRIO port 2 */
 
@@ -266,21 +270,21 @@
 /*
  * RapidIO
  */
-#define CONFIG_SYS_RIO1_MEM_VIRT	0xa0000000
+#define CONFIG_SYS_SRIO1_MEM_VIRT	0xa0000000
 #ifdef CONFIG_PHYS_64BIT
-#define CONFIG_SYS_RIO1_MEM_PHYS	0xc20000000ull
+#define CONFIG_SYS_SRIO1_MEM_PHYS	0xc20000000ull
 #else
-#define CONFIG_SYS_RIO1_MEM_PHYS	0xa0000000
+#define CONFIG_SYS_SRIO1_MEM_PHYS	0xa0000000
 #endif
-#define CONFIG_SYS_RIO1_MEM_SIZE	0x10000000	/* 256M */
+#define CONFIG_SYS_SRIO1_MEM_SIZE	0x10000000	/* 256M */
 
-#define CONFIG_SYS_RIO2_MEM_VIRT	0xb0000000
+#define CONFIG_SYS_SRIO2_MEM_VIRT	0xb0000000
 #ifdef CONFIG_PHYS_64BIT
-#define CONFIG_SYS_RIO2_MEM_PHYS	0xc30000000ull
+#define CONFIG_SYS_SRIO2_MEM_PHYS	0xc30000000ull
 #else
-#define CONFIG_SYS_RIO2_MEM_PHYS	0xb0000000
+#define CONFIG_SYS_SRIO2_MEM_PHYS	0xb0000000
 #endif
-#define CONFIG_SYS_RIO2_MEM_SIZE	0x10000000	/* 256M */
+#define CONFIG_SYS_SRIO2_MEM_SIZE	0x10000000	/* 256M */
 
 /*
  * General PCI
@@ -442,13 +446,11 @@
 #define CONFIG_SYS_FM1_DTSEC4_PHY_ADDR	0x1f
 #define CONFIG_SYS_FM1_10GEC1_PHY_ADDR	4
 
-#if (CONFIG_SYS_NUM_FMAN == 2)
 #define CONFIG_SYS_FM2_DTSEC1_PHY_ADDR	0x1c
 #define CONFIG_SYS_FM2_DTSEC2_PHY_ADDR	0x1d
 #define CONFIG_SYS_FM2_DTSEC3_PHY_ADDR	0x1e
 #define CONFIG_SYS_FM2_DTSEC4_PHY_ADDR	0x1f
 #define CONFIG_SYS_FM2_10GEC1_PHY_ADDR	0
-#endif
 
 #define CONFIG_SYS_TBIPA_VALUE	8
 #define CONFIG_MII		/* MII PHY management */
@@ -532,6 +534,7 @@
  * the maximum mapped by the Linux kernel during initialization.
  */
 #define CONFIG_SYS_BOOTMAPSZ	(16 << 20)	/* Initial Memory map for Linux*/
+#define CONFIG_SYS_BOOTM_LEN	(16 << 20)	/* Increase max gunzip size */
 
 #ifdef CONFIG_CMD_KGDB
 #define CONFIG_KGDB_BAUDRATE	230400	/* speed to run kgdb serial port */