X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fcorenet_ds.h;h=2f3c4978ef1ec496eb89906ab1c3b23781daf1cb;hb=07dea2e737f78ee70e81c27d976811f0e9fdbad8;hp=a58c12a4545d6a6398cd8d7a5c3dcc29dbed2707;hpb=1f20fc53b382ece8da7440f354b219deb7ed19df;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index a58c12a..2f3c497 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -48,10 +48,6 @@ #define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */ #define CONFIG_MP /* support multiple processors */ -#ifndef CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_TEXT_BASE 0xeff40000 -#endif - #ifndef CONFIG_RESET_VECTOR_ADDRESS #define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc #endif @@ -127,8 +123,6 @@ #define CONFIG_POST CONFIG_SYS_POST_MEMORY /* test POST memory test */ #define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x00400000 -#define CONFIG_SYS_ALT_MEMTEST -#define CONFIG_PANIC_HANG /* do not reset board on panic */ /* * Config the L3 Cache as L3 SRAM @@ -273,7 +267,6 @@ #define CONFIG_SYS_FLASH_AMD_CHECK_DQ7 #define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000, CONFIG_SYS_FLASH_BASE_PHYS} -#define CONFIG_BOARD_EARLY_INIT_R /* call board_early_init_r function */ #define CONFIG_MISC_INIT_R #define CONFIG_HWCONFIG @@ -306,7 +299,6 @@ * open - index 2 * shorted - index 1 */ -#define CONFIG_CONS_INDEX 1 #define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE 1 #define CONFIG_SYS_NS16550_CLK (get_bus_freq(0)/2) @@ -454,7 +446,6 @@ #define CONFIG_SYS_PCIE4_IO_SIZE 0x00010000 /* 64k */ /* Qman/Bman */ -#define CONFIG_SYS_DPAA_QBMAN /* Support Q/Bman */ #define CONFIG_SYS_BMAN_NUM_PORTALS 10 #define CONFIG_SYS_BMAN_MEM_BASE 0xf4000000 #ifdef CONFIG_PHYS_64BIT @@ -541,9 +532,6 @@ /* SATA */ #ifdef CONFIG_FSL_SATA_V2 -#define CONFIG_LIBATA -#define CONFIG_FSL_SATA - #define CONFIG_SYS_SATA_MAX_DEVICE 2 #define CONFIG_SATA1 #define CONFIG_SYS_SATA1 CONFIG_SYS_MPC85xx_SATA1_ADDR @@ -591,7 +579,6 @@ #endif #ifdef CONFIG_MMC -#define CONFIG_FSL_ESDHC #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR #define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT #endif @@ -599,11 +586,7 @@ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_CMDLINE_EDITING /* Command-line editing */ -#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ /* * For booting Linux, the board info and command line data