X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fcolibri_pxa270.h;h=975f745c98a1d139e341a3dcc18504dedefe55fe;hb=0f9595b9fa68ed1634adddf989fd037909eec433;hp=981a3fe4c2fd384442791d0c51ba509e77a871c2;hpb=1f20fc53b382ece8da7440f354b219deb7ed19df;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/colibri_pxa270.h b/include/configs/colibri_pxa270.h index 981a3fe..975f745 100644 --- a/include/configs/colibri_pxa270.h +++ b/include/configs/colibri_pxa270.h @@ -1,10 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * Toradex Colibri PXA270 configuration file * * Copyright (C) 2010 Marek Vasut * Copyright (C) 2015-2016 Marcel Ziswiler - * - * SPDX-License-Identifier: GPL-2.0+ */ #ifndef __CONFIG_H @@ -13,35 +12,12 @@ /* * High Level Board Configuration Options */ -#define CONFIG_CPU_PXA27X 1 /* Marvell PXA270 CPU */ -#define CONFIG_SYS_TEXT_BASE 0x0 /* Avoid overwriting factory configuration block */ #define CONFIG_BOARD_SIZE_LIMIT 0x40000 -/* We will never enable dcache because we have to setup MMU first */ -#define CONFIG_SYS_DCACHE_OFF - -#define CONFIG_DISPLAY_BOARDINFO_LATE /* Calls show_board_info() */ - /* * Environment settings */ -#define CONFIG_ENV_OVERWRITE -#define CONFIG_ENV_VARS_UBOOT_CONFIG -#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG -#define CONFIG_SYS_MALLOC_LEN (128 * 1024) -#define CONFIG_ARCH_CPU_INIT -#define CONFIG_BOOTCOMMAND \ - "if fatload mmc 0 0xa0000000 uImage; then " \ - "bootm 0xa0000000; " \ - "fi; " \ - "if usb reset && fatload usb 0 0xa0000000 uImage; then " \ - "bootm 0xa0000000; " \ - "fi; " \ - "bootm 0xc0000;" -#define CONFIG_TIMESTAMP -#define CONFIG_CMDLINE_TAG -#define CONFIG_SETUP_MEMORY_TAGS /* * Serial Console Configuration @@ -52,11 +28,10 @@ */ /* I2C support */ -#ifdef CONFIG_SYS_I2C +#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY) #define CONFIG_SYS_I2C_PXA #define CONFIG_PXA_STD_I2C #define CONFIG_PXA_PWR_I2C -#define CONFIG_SYS_I2C_SPEED 100000 #endif /* LCD support */ @@ -78,17 +53,8 @@ #define CONFIG_NET_RETRY_COUNT 10 #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME #endif -#undef CONFIG_SYS_LONGHELP /* Saves 10 KB */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -#define CONFIG_SYS_DEVICE_NULLDEV 1 -#undef CONFIG_CMDLINE_EDITING /* Saves 2.5 KB */ -#undef CONFIG_AUTO_COMPLETE /* Saves 2.5 KB */ - /* * Clock Configuration */ @@ -97,17 +63,12 @@ /* * DRAM Map */ -#define CONFIG_NR_DRAM_BANKS 1 /* We have 1 bank of DRAM */ #define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */ #define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */ #define CONFIG_SYS_DRAM_BASE 0xa0000000 /* CS0 */ #define CONFIG_SYS_DRAM_SIZE 0x04000000 /* 64 MB DRAM */ -#define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */ - -#define CONFIG_SYS_LOAD_ADDR PHYS_SDRAM_1 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 #define CONFIG_SYS_INIT_SP_ADDR 0x5c010000 @@ -119,30 +80,20 @@ #define PHYS_FLASH_SIZE 0x02000000 /* 32 MB */ #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER 1 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_32BIT #define CONFIG_SYS_MAX_FLASH_SECT (4 + 255) -#define CONFIG_SYS_MAX_FLASH_BANKS 1 #define CONFIG_SYS_FLASH_ERASE_TOUT (25 * CONFIG_SYS_HZ) #define CONFIG_SYS_FLASH_WRITE_TOUT (25 * CONFIG_SYS_HZ) #define CONFIG_SYS_FLASH_LOCK_TOUT (25 * CONFIG_SYS_HZ) #define CONFIG_SYS_FLASH_UNLOCK_TOUT (25 * CONFIG_SYS_HZ) - -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 -#define CONFIG_SYS_FLASH_PROTECTION 1 #endif #define CONFIG_SYS_MONITOR_BASE 0x0 #define CONFIG_SYS_MONITOR_LEN 0x40000 /* Skip factory configuration block */ -#define CONFIG_ENV_ADDR \ - (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN + 0x40000) -#define CONFIG_ENV_SIZE 0x40000 -#define CONFIG_ENV_SECT_SIZE 0x40000 /* * GPIO settings