X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fcm_t35.h;h=1898e3837d52a097ccb12ac11026aba45611558a;hb=4125bbcef6a998ce8580a1f5c53c8c93a56a125b;hp=de1999d431e4e256e4ac1a381a4f4d9f4ec5e016;hpb=bb597c0eeb7ee2f6e983577d993c76a30dd3c2b4;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/cm_t35.h b/include/configs/cm_t35.h index de1999d..1898e38 100644 --- a/include/configs/cm_t35.h +++ b/include/configs/cm_t35.h @@ -22,26 +22,13 @@ /* * High Level Configuration Options */ -#define CONFIG_OMAP /* in a TI OMAP core */ -#define CONFIG_OMAP_GPIO #define CONFIG_CM_T3X /* working with CM-T35 and CM-T3730 */ -#define CONFIG_OMAP_COMMON -/* Common ARM Erratas */ -#define CONFIG_ARM_ERRATA_454179 -#define CONFIG_ARM_ERRATA_430973 -#define CONFIG_ARM_ERRATA_621766 #define CONFIG_SDRC /* The chip has SDRC controller */ #include /* get chip and board defs */ #include -/* - * Display CPU and Board information - */ -#define CONFIG_DISPLAY_CPUINFO -#define CONFIG_DISPLAY_BOARDINFO - /* Clock Defines */ #define V_OSCK 26000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK >> 1) @@ -83,27 +70,17 @@ /* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE -#define CONFIG_BAUDRATE 115200 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 115200} -#define CONFIG_GENERIC_MMC -#define CONFIG_MMC -#define CONFIG_OMAP_HSMMC -#define CONFIG_DOS_PARTITION - /* USB */ #define CONFIG_USB_OMAP3 -#define CONFIG_USB_EHCI -#define CONFIG_USB_EHCI_OMAP -#define CONFIG_USB_STORAGE #define CONFIG_USB_MUSB_UDC #define CONFIG_TWL4030_USB /* USB device configuration */ #define CONFIG_USB_DEVICE #define CONFIG_USB_TTY -#define CONFIG_SYS_CONSOLE_IS_IN_ENV /* commands to include */ #define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */ @@ -116,7 +93,6 @@ #define CONFIG_CMD_NAND /* NAND support */ -#define CONFIG_SYS_NO_FLASH #define CONFIG_SYS_I2C #define CONFIG_SYS_OMAP24_I2C_SPEED 100000 #define CONFIG_SYS_OMAP24_I2C_SLAVE 1 @@ -129,7 +105,6 @@ /* * TWL4030 */ -#define CONFIG_TWL4030_POWER #define CONFIG_TWL4030_LED /* @@ -145,8 +120,6 @@ /* devices */ /* Environment information */ -#define CONFIG_ZERO_BOOTDELAY_CHECK - #define CONFIG_EXTRA_ENV_SETTINGS \ "loadaddr=0x82000000\0" \ "usbtty=cdc_acm\0" \ @@ -267,33 +240,16 @@ GENERATED_GBL_DATA_SIZE) /* Status LED */ -#define CONFIG_STATUS_LED /* Status LED enabled */ -#define CONFIG_BOARD_SPECIFIC_LED -#define CONFIG_GPIO_LED #define GREEN_LED_GPIO 186 /* CM-T35 Green LED is GPIO186 */ -#define GREEN_LED_DEV 0 -#define STATUS_LED_BIT GREEN_LED_GPIO -#define STATUS_LED_STATE STATUS_LED_ON -#define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2) -#define STATUS_LED_BOOT GREEN_LED_DEV #define CONFIG_SPLASHIMAGE_GUARD -/* GPIO banks */ -#ifdef CONFIG_STATUS_LED -#define CONFIG_OMAP3_GPIO_6 /* GPIO186 is in GPIO bank 6 */ -#endif - /* Display Configuration */ -#define CONFIG_OMAP3_GPIO_2 -#define CONFIG_OMAP3_GPIO_5 #define CONFIG_VIDEO_OMAP3 #define LCD_BPP LCD_COLOR16 -#define CONFIG_LCD #define CONFIG_SPLASH_SCREEN #define CONFIG_SPLASH_SOURCE -#define CONFIG_CMD_BMP #define CONFIG_BMP_16BPP #define CONFIG_SCF0403_LCD @@ -303,27 +259,15 @@ #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_NAND_SIMPLE -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ -#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */ #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" #define CONFIG_SPL_BOARD_INIT -#define CONFIG_SPL_LIBCOMMON_SUPPORT -#define CONFIG_SPL_LIBDISK_SUPPORT -#define CONFIG_SPL_I2C_SUPPORT -#define CONFIG_SPL_LIBGENERIC_SUPPORT -#define CONFIG_SPL_MMC_SUPPORT -#define CONFIG_SPL_FAT_SUPPORT -#define CONFIG_SPL_SERIAL_SUPPORT -#define CONFIG_SPL_NAND_SUPPORT #define CONFIG_SPL_NAND_BASE #define CONFIG_SPL_NAND_DRIVERS #define CONFIG_SPL_NAND_ECC -#define CONFIG_SPL_GPIO_SUPPORT -#define CONFIG_SPL_POWER_SUPPORT #define CONFIG_SPL_OMAP3_ID_NAND -#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" +#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds" /* NAND boot config */ #define CONFIG_SYS_NAND_5_ADDR_CYCLE @@ -346,7 +290,8 @@ #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 #define CONFIG_SPL_TEXT_BASE 0x40200800 -#define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */ +#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ + CONFIG_SPL_TEXT_BASE) /* * Use 0x80008000 as TEXT_BASE here for compatibility reasons with the