X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fcgtqmx6eval.h;h=5d247886aeda8a3bf347dac549213068f10e63c1;hb=d01806a8fcbdaedcc67cead56ece572021d97ab7;hp=91b7959a4f24f2c74216d72406c5c0611bb76d64;hpb=1fdf7c64edcc4131934013741b1902b79c8715fd;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/cgtqmx6eval.h b/include/configs/cgtqmx6eval.h index 91b7959..5d24788 100644 --- a/include/configs/cgtqmx6eval.h +++ b/include/configs/cgtqmx6eval.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * * Congatec Conga-QEVAl board configuration file. @@ -6,8 +7,6 @@ * Based on Freescale i.MX6Q Sabre Lite board configuration file. * Copyright (C) 2013, Adeneo Embedded * Leo Sartre, - * - * SPDX-License-Identifier: GPL-2.0+ */ #ifndef __CONFIG_CGTQMX6EVAL_H @@ -18,20 +17,13 @@ #define CONFIG_MACH_TYPE 4122 #ifdef CONFIG_SPL -#define CONFIG_SPL_SPI_SUPPORT -#define CONFIG_SPL_SPI_FLASH_SUPPORT #define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024) -#define CONFIG_SPL_SPI_LOAD #include "imx6_spl.h" #endif /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) -#define CONFIG_BOARD_EARLY_INIT_F -#define CONFIG_BOARD_LATE_INIT -#define CONFIG_MISC_INIT_R - #define CONFIG_MXC_UART #define CONFIG_MXC_UART_BASE UART2_BASE @@ -42,14 +34,10 @@ #define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_STMICRO #define CONFIG_SPI_FLASH_SST -#define CONFIG_MXC_SPI #define CONFIG_SF_DEFAULT_BUS 0 #define CONFIG_SF_DEFAULT_SPEED 20000000 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) -/* Miscellaneous commands */ -#define CONFIG_CMD_BMODE - /* Thermal support */ #define CONFIG_IMX_THERMAL @@ -68,79 +56,44 @@ #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 /* USB Configs */ -#define CONFIG_USB_EHCI -#define CONFIG_USB_EHCI_MX6 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET -#define CONFIG_USB_HOST_ETHER -#define CONFIG_USB_ETHER_ASIX #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 /* Enabled USB controller number */ -#define CONFIG_USB_KEYBOARD -#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP #define CONFIG_USBD_HS -#define CONFIG_USB_FUNCTION_MASS_STORAGE - -/* USB Device Firmware Update support */ -#define CONFIG_USB_FUNCTION_DFU -#define CONFIG_DFU_MMC -#define CONFIG_DFU_SF - -#define CONFIG_USB_FUNCTION_FASTBOOT -#define CONFIG_CMD_FASTBOOT -#define CONFIG_ANDROID_BOOT_IMAGE -#define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR -#define CONFIG_FASTBOOT_BUF_SIZE 0x07000000 - /* Framebuffer */ -#define CONFIG_VIDEO #define CONFIG_VIDEO_IPUV3 -#define CONFIG_CFB_CONSOLE -#define CONFIG_VGA_AS_SINGLE_DEVICE -#define CONFIG_SYS_CONSOLE_IS_IN_ENV -#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE #define CONFIG_VIDEO_BMP_RLE8 #define CONFIG_SPLASH_SCREEN #define CONFIG_SPLASH_SCREEN_ALIGN #define CONFIG_BMP_16BPP #define CONFIG_VIDEO_LOGO #define CONFIG_VIDEO_BMP_LOGO -#ifdef CONFIG_MX6DL -#define CONFIG_IPUV3_CLK 198000000 -#else -#define CONFIG_IPUV3_CLK 264000000 -#endif #define CONFIG_IMX_HDMI /* SATA */ -#define CONFIG_CMD_SATA -#define CONFIG_DWC_AHSATA #define CONFIG_SYS_SATA_MAX_DEVICE 1 #define CONFIG_DWC_AHSATA_PORT_ID 0 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR #define CONFIG_LBA48 -#define CONFIG_LIBATA /* Ethernet */ #define CONFIG_FEC_MXC -#define CONFIG_MII #define IMX_FEC_BASE ENET_BASE_ADDR #define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_ETHPRIME "FEC" #define CONFIG_FEC_MXC_PHYADDR 6 -#define CONFIG_PHYLIB #define CONFIG_PHY_ATHEROS /* Command definition */ #define CONFIG_MXC_UART_BASE UART2_BASE -#define CONFIG_CONSOLE_DEV "ttymxc1" +#define CONSOLE_DEV "ttymxc1" #define CONFIG_MMCROOT "/dev/mmcblk0p2" #define CONFIG_SYS_MMC_ENV_DEV 0 -#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG #define CONFIG_EXTRA_ENV_SETTINGS \ "script=boot.scr\0" \ "image=zImage\0" \ @@ -148,7 +101,7 @@ "fdt_addr_r=0x18000000\0" \ "boot_fdt=try\0" \ "ip_dyn=yes\0" \ - "console=" CONFIG_CONSOLE_DEV "\0" \ + "console=" CONSOLE_DEV "\0" \ "dfuspi=dfu 0 sf 0:0:10000000:0\0" \ "dfu_alt_info_spl=spl raw 0x400\0" \ "dfu_alt_info_img=u-boot raw 0x10000\0" \ @@ -246,7 +199,6 @@ #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM @@ -266,7 +218,6 @@ #define CONFIG_ENV_SIZE (8 * 1024) -#define CONFIG_ENV_IS_IN_SPI_FLASH #if defined(CONFIG_ENV_IS_IN_SPI_FLASH) #define CONFIG_ENV_OFFSET (768 * 1024) #define CONFIG_ENV_SECT_SIZE (64 * 1024)