X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fcapricorn-common.h;h=e42f2b544c94259c86219bd595e3460c86a868e5;hb=970bf8603b877e2b66170290f751f9c23c120838;hp=38a56e897e82d85b05545a9ee857fdcf0c5aeaef;hpb=621e09cb3bf7e6d4fce9dd5e6de97e057adebc3a;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/capricorn-common.h b/include/configs/capricorn-common.h index 38a56e8..e42f2b5 100644 --- a/include/configs/capricorn-common.h +++ b/include/configs/capricorn-common.h @@ -20,9 +20,7 @@ #define CONFIG_SYS_MONITOR_LEN (1024 * 1024) #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x800 -#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 0 -#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds" #define CONFIG_SPL_STACK 0x013E000 #define CONFIG_SPL_BSS_START_ADDR 0x00128000 #define CONFIG_SPL_BSS_MAX_SIZE 0x1000 /* 4 KB */ @@ -44,7 +42,6 @@ /* ENET Config */ #define CONFIG_FEC_XCV_TYPE RMII -#define FEC_QUIRK_ENET_MAC /* ENET1 connects to base board and MUX with ESAI */ #define CONFIG_FEC_ENET_DEV 1 @@ -53,7 +50,6 @@ /* I2C Configuration */ #ifndef CONFIG_SPL_BUILD -#define CONFIG_SYS_I2C_SPEED 400000 /* EEPROM */ #define EEPROM_I2C_BUS 0 /* I2C0 */ #define EEPROM_I2C_ADDR 0x50 @@ -121,31 +117,13 @@ ENV_EMMC \ ENV_NET -#define CONFIG_BOOTCOMMAND \ - "if usrbutton; then " \ - "run flash_self_test; " \ - "reset; " \ - "fi;" \ - "run flash_self;" \ - "reset;" - /* Default location for tftp and bootm */ -#define CONFIG_LOADADDR 0x80280000 -#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR #define CONFIG_SYS_INIT_SP_ADDR 0x80200000 -/* Environment organisation */ -#define CONFIG_ENV_OVERWRITE -#define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC1, eMMC */ -#define CONFIG_SYS_MMC_ENV_PART 2 /* 2nd boot partition */ - /* On CCP board, USDHC1 is for eMMC */ #define CONFIG_MMCROOT "/dev/mmcblk0p2" /* eMMC */ #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 -/* Size of malloc() pool */ -#define CONFIG_SYS_MALLOC_LEN ((CONFIG_ENV_SIZE + (32 * 1024)) * 1024) - #define CONFIG_SYS_SDRAM_BASE 0x80000000 #define PHYS_SDRAM_1 0x80000000 #define PHYS_SDRAM_2 0x880000000