X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fbur_am335x_common.h;h=1bbfa16660e82427c4651a1ab3e91cdb4a421a0d;hb=29d280c88a1ff331dce2d4c7a5aaf2402aa0fd8a;hp=1de5edc3019781fbfe239c8311536662eb41cd97;hpb=fa2f81b06f666710c756d25297d7a9ca48c65935;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/bur_am335x_common.h b/include/configs/bur_am335x_common.h index 1de5edc..1bbfa16 100644 --- a/include/configs/bur_am335x_common.h +++ b/include/configs/bur_am335x_common.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * bur_am335x_common.h * @@ -5,42 +6,33 @@ * * Copyright (C) 2016 Hannes Schmelzer - * Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com - * - * SPDX-License-Identifier: GPL-2.0+ */ #ifndef __BUR_AM335X_COMMON_H__ #define __BUR_AM335X_COMMON_H__ /* ------------------------------------------------------------------------- */ -#define CONFIG_AM33XX -#define CONFIG_OMAP -#define CONFIG_OMAP_COMMON + +/* legacy #defines for non DM bur-board */ +#ifndef CONFIG_DM +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE (-4) +#define CONFIG_SYS_NS16550_CLK (48000000) +#define CONFIG_SYS_NS16550_COM1 0x44e09000 + +#define CONFIG_I2C +#define CONFIG_SYS_I2C + +#endif /* CONFIG_DM */ + #define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */ /* Timer information */ #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ #define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */ -#define CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC /* enable 32kHz OSC at bootime */ -#define CONFIG_SPL_POWER_SUPPORT #define CONFIG_POWER_TPS65217 -#define CONFIG_SYS_NO_FLASH /* have no NOR-flash */ - #include -/* NS16550 Configuration */ -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE (-4) -#define CONFIG_SYS_NS16550_CLK 48000000 -#define CONFIG_SYS_NS16550_COM1 0x44e09000 /* UART0 */ -#define CONFIG_BAUDRATE 115200 - -/* Network defines */ -#define CONFIG_DRIVER_TI_CPSW /* Driver for IP block */ -#define CONFIG_MII /* Required in net/eth.c */ -#define CONFIG_PHYLIB -#define CONFIG_PHY_NATSEMI - /* * SPL related defines. The Public RAM memory map the ROM defines the * area between 0x402F0400 and 0x4030B800 as a download area and @@ -71,19 +63,10 @@ * always, even when we have more. We always start at 0x80000000, * and we place the initial stack pointer in our SRAM. */ -#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_SDRAM_BASE 0x80000000 #define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \ GENERATED_GBL_DATA_SIZE) -/* I2C */ -#define CONFIG_SYS_I2C -#define CONFIG_SYS_OMAP24_I2C_SPEED 100000 -#define CONFIG_SYS_OMAP24_I2C_SLAVE 1 -#define CONFIG_SYS_I2C_OMAP24XX -/* GPIO */ -#define CONFIG_OMAP_GPIO - /* * Our platforms make use of SPL to initalize the hardware (primarily * memory) enough for full U-Boot to be loaded. We also support Falcon @@ -92,7 +75,6 @@ * under common/spl/. Given our generally common memory map, we set a * number of related defaults and sizes here. */ -#define CONFIG_SPL_FRAMEWORK /* * Place the image at the start of the ROM defined image space. * We limit our size to the ROM-defined downloaded image area, and use the @@ -104,8 +86,6 @@ * * ---------------------------------------------------------------------------- */ -#undef CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_TEXT_BASE 0x80800000 #define CONFIG_SPL_BSS_START_ADDR 0x80A00000 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ @@ -113,12 +93,5 @@ #define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN /* General parts of the framework, required. */ -#define CONFIG_SPL_I2C_SUPPORT -#define CONFIG_SPL_LIBCOMMON_SUPPORT -#define CONFIG_SPL_LIBGENERIC_SUPPORT -#define CONFIG_SPL_SERIAL_SUPPORT -#define CONFIG_SPL_BOARD_INIT -#define CONFIG_SPL_YMODEM_SUPPORT -#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds" #endif /* ! __BUR_AM335X_COMMON_H__ */