X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fbf533-stamp.h;h=842207f731175e90931dc75227add7bc247a8619;hb=bb1f8b4f8bb0bfce52e0faa4637b975b745824b3;hp=79a1404a40db3e3ed291b9950c5faeac3248b914;hpb=ee89bf2782406b1f87088b4764aeb6f811d82526;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/bf533-stamp.h b/include/configs/bf533-stamp.h index 79a1404..842207f 100644 --- a/include/configs/bf533-stamp.h +++ b/include/configs/bf533-stamp.h @@ -5,40 +5,19 @@ #ifndef __CONFIG_STAMP_H__ #define __CONFIG_STAMP_H__ -#define CONFIG_STAMP 1 +#include + #define CONFIG_RTC_BFIN 1 -#define CONFIG_BF533 1 -/* - * Boot Mode Set - * Blackfin can support several boot modes - */ -#define BF533_BYPASS_BOOT 0x0001 /* Bootmode 0: Execute from 16-bit externeal memory ( bypass BOOT ROM) */ -#define BF533_PARA_BOOT 0x0002 /* Bootmode 1: Boot from 8-bit or 16-bit flash */ -#define BF533_SPI_BOOT 0x0004 /* Bootmode 3: Boot from SPI flash */ -/* Define the boot mode */ -#define BFIN_BOOT_MODE BF533_BYPASS_BOOT -/* #define BFIN_BOOT_MODE BF533_SPI_BOOT */ #define CONFIG_PANIC_HANG 1 -#define ADSP_BF531 0x31 -#define ADSP_BF532 0x32 -#define ADSP_BF533 0x33 -#define BFIN_CPU ADSP_BF533 +#define CONFIG_BFIN_CPU bf533-0.3 +#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS /* This sets the default state of the cache on U-Boot's boot */ #define CONFIG_ICACHE_ON #define CONFIG_DCACHE_ON -/* Define where the uboot will be loaded by on-chip boot rom */ -#define APP_ENTRY 0x00001000 - -/* - * Stringize definitions - needed for environmental settings - */ -#define STRINGIZE2(x) #x -#define STRINGIZE(x) STRINGIZE2(x) - /* * Board settings */ @@ -46,7 +25,7 @@ #define CONFIG_SMC91111_BASE 0x20300300 /* FLASH/ETHERNET uses the same address range */ -#define SHARED_RESOURCES 1 +#define SHARED_RESOURCES 1 /* Is I2C bit-banged? */ #define CONFIG_SOFT_I2C 1 @@ -62,8 +41,6 @@ */ #define CONFIG_VIDEO 0 -#define CONFIG_VDSP 1 - /* * Clock settings */ @@ -89,10 +66,7 @@ /* Values can range from 2-65535 */ /* SCK Frequency = SCLK / (2 * CONFIG_SPI_BAUD) */ #define CONFIG_SPI_BAUD 2 - -#if (BFIN_BOOT_MODE == BF533_SPI_BOOT) #define CONFIG_SPI_BAUD_INITBLOCK 4 -#endif /* * Network settings @@ -120,25 +94,25 @@ */ #define CFG_FLASH_CFI /* The flash is CFI compatible */ -#define CFG_FLASH_CFI_DRIVER /* Use common CFI driver */ +#define CONFIG_FLASH_CFI_DRIVER /* Use common CFI driver */ #define CFG_FLASH_CFI_AMD_RESET #define CFG_FLASH_BASE 0x20000000 #define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ #define CFG_MAX_FLASH_SECT 67 /* max number of sectors on one chip */ -#if (BFIN_BOOT_MODE == BF533_BYPASS_BOOT) +#if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_SPI_MASTER) +#define CONFIG_ENV_IS_IN_EEPROM 1 +#define CFG_ENV_OFFSET 0x4000 +#define CFG_ENV_HEADER (CFG_ENV_OFFSET + 0x12A) /* 0x12A is the length of LDR file header */ +#else #define CFG_ENV_IS_IN_FLASH 1 #define CFG_ENV_ADDR 0x20004000 #define CFG_ENV_OFFSET (CFG_ENV_ADDR - CFG_FLASH_BASE) -#elif (BFIN_BOOT_MODE == BF533_SPI_BOOT) -#define CFG_ENV_IS_IN_EEPROM 1 -#define CFG_ENV_OFFSET 0x4000 -#define CFG_ENV_HEADER (CFG_ENV_OFFSET + 0x12A) /* 0x12A is the length of LDR file header */ #endif #define CFG_ENV_SIZE 0x2000 -#define CFG_ENV_SECT_SIZE 0x2000 /* Total Size of Environment Sector */ +#define CFG_ENV_SECT_SIZE 0x2000 /* Total Size of Environment Sector */ #define ENV_IS_EMBEDDED #define CFG_FLASH_ERASE_TOUT 30000 /* Timeout for Chip Erase (in ms) */ @@ -149,7 +123,7 @@ #define CFG_JFFS2_FIRST_BANK 0 #define CFG_JFFS2_NUM_BANKS 1 /* 512k reserved for u-boot */ -#define CFG_JFFS2_FIRST_SECTOR 11 +#define CFG_JFFS2_FIRST_SECTOR 11 /* * following timeouts shall be used once the @@ -166,11 +140,7 @@ #define CONFIG_MEM_ADD_WDTH 11 /* 8, 9, 10, 11 */ #define CONFIG_MEM_MT48LC64M4A2FB_7E 1 -#if (BFIN_BOOT_MODE == BF533_BYPASS_BOOT) #define CFG_MEMTEST_START 0x00000000 /* memtest works on */ -#elif (BFIN_BOOT_MODE == BF533_SPI_BOOT) -#define CFG_MEMTEST_START 0x00100000 /* memtest works on */ -#endif #define CFG_SDRAM_BASE 0x00000000 @@ -178,7 +148,7 @@ #define CFG_MEMTEST_END (CFG_MAX_RAM_SIZE - 0x80000 - 1) #define CONFIG_LOADADDR 0x01000000 -#define CFG_LOAD_ADDR CONFIG_LOADADDR +#define CFG_LOAD_ADDR CONFIG_LOADADDR #define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ #define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ #define CFG_GBL_DATA_SIZE 0x4000 /* Reserve 16k for Global Data */ @@ -208,14 +178,6 @@ #define CONFIG_SCLK_HZ CONFIG_CLKIN_HZ #endif -#if (BFIN_BOOT_MODE == BF533_SPI_BOOT) -#if (CONFIG_SCLK_HZ / (2*CONFIG_SPI_BAUD) > 20000000) -#define CONFIG_SPI_FLASH_FAST_READ 1 /* Needed if SPI_CLK > 20 MHz */ -#else -#undef CONFIG_SPI_FLASH_FAST_READ -#endif -#endif - /* * Command settings */ @@ -223,43 +185,18 @@ #define CFG_LONGHELP 1 #define CONFIG_CMDLINE_EDITING 1 -#if (BFIN_BOOT_MODE == BF533_BYPASS_BOOT) #define CFG_AUTOLOAD "no" /*rarpb, bootp or dhcp commands will perform only a */ -#endif /* configuration lookup from the BOOTP/DHCP server, */ /* but not try to load any image using TFTP */ #define CONFIG_BOOTDELAY 5 #define CONFIG_BOOT_RETRY_TIME -1 /* Enable this if bootretry required, currently its disabled */ -#if (BFIN_BOOT_MODE == BF533_BYPASS_BOOT) #define CONFIG_BOOTCOMMAND "run ramboot" -#elif (BFIN_BOOT_MODE == BF533_SPI_BOOT) -#define CONFIG_BOOTCOMMAND "eeprom read 0x1000000 0x100000 0x180000;icache on;dcache on;bootm 0x1000000" -#endif #define CONFIG_BOOTARGS "root=/dev/mtdblock0 rw console=ttyBF0,57600" -#if (CONFIG_DRIVER_SMC91111) -#define CONFIG_COMMANDS1 (CONFIG_CMD_DFL | \ - CFG_CMD_PING | \ - CFG_CMD_ELF | \ - CFG_CMD_CACHE | \ - CFG_CMD_JFFS2 | \ - CFG_CMD_EEPROM | \ - CFG_CMD_DATE) -#else -#define CONFIG_COMMANDS1 (CONFIG_CMD_DFL | \ - CFG_CMD_ELF | \ - CFG_CMD_CACHE | \ - CFG_CMD_JFFS2 | \ - CFG_CMD_EEPROM | \ - CFG_CMD_DATE) -#endif - -#if (BFIN_BOOT_MODE == BF533_BYPASS_BOOT) -#if (CONFIG_DRIVER_SMC91111) #define CONFIG_EXTRA_ENV_SETTINGS \ "ramargs=setenv bootargs root=/dev/mtdblock0 rw console=ttyBF0,57600\0" \ "nfsargs=setenv bootargs root=/dev/nfs rw nfsroot=$(serverip):" \ @@ -275,29 +212,6 @@ "protect off 0x20000000 0x2003FFFF; erase 0x20000000 0x2003FFFF;" \ "cp.b $(loadaddr) 0x20000000 $(filesize)\0" \ "" -#else -#define CONFIG_EXTRA_ENV_SETTINGS \ - "ramargs=setenv bootargs root=/dev/mtdblock0 rw console=ttyBF0,57600\0" \ - "flashboot=bootm 0x20100000\0" \ - " -#endif - -#elif (BFIN_BOOT_MODE == BF533_SPI_BOOT) -#define CONFIG_EXTRA_ENV_SETTINGS \ - "ramargs=setenv bootargs root=/dev/mtdblock0 rw console=ttyBF0,57600\0" \ - "nfsargs=setenv bootargs root=/dev/nfs rw nfsroot=$(serverip):" \ - "$(rootpath) console=ttyBF0,57600\0" \ - "addip=setenv bootargs $(bootargs) ip=$(ipaddr):$(serverip):" \ - "$(gatewayip):$(netmask):$(hostname):eth0:off\0" \ - "ramboot=tftpboot $(loadaddr) linux; " \ - "run ramargs;run addip;bootelf\0" \ - "nfsboot=tftpboot $(loadaddr) linux; " \ - "run nfsargs;run addip;bootelf\0" \ - "flashboot=bootm 0x20100000\0" \ - "update=tftpboot $(loadaddr) u-boot.ldr;" \ - "eeprom write $(loadaddr) 0x0 $(filesize);\0"\ - "" -#endif #ifdef CONFIG_SOFT_I2C #if (!CONFIG_SOFT_I2C) @@ -305,20 +219,37 @@ #endif #endif -#if (CONFIG_SOFT_I2C) -#define CONFIG_COMMANDS2 CFG_CMD_I2C -#else -#define CONFIG_COMMANDS2 0 -#endif /* CONFIG_SOFT_I2C */ -#if (BFIN_BOOT_MODE == BF533_BYPASS_BOOT) -#define CONFIG_COMMANDS ( CONFIG_COMMANDS1 | CONFIG_COMMANDS2 | CFG_CMD_DHCP) -#elif (BFIN_BOOT_MODE == BF533_SPI_BOOT) -#define CONFIG_COMMANDS ( CONFIG_COMMANDS1 | CONFIG_COMMANDS2) +/* + * BOOTP options + */ +#define CONFIG_BOOTP_BOOTFILESIZE +#define CONFIG_BOOTP_BOOTPATH +#define CONFIG_BOOTP_GATEWAY +#define CONFIG_BOOTP_HOSTNAME + + +/* + * Command line configuration. + */ +#include + +#define CONFIG_CMD_ELF +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_JFFS2 +#define CONFIG_CMD_EEPROM +#define CONFIG_CMD_DATE + +#if (CONFIG_DRIVER_SMC91111) +#define CONFIG_CMD_PING #endif -/* This must be included AFTER the definition of CONFIG_COMMANDS (if any) */ -#include +#if (CONFIG_SOFT_I2C) +#define CONFIG_CMD_I2C +#endif + +#define CONFIG_CMD_DHCP + /* * Console settings @@ -327,25 +258,9 @@ #define CONFIG_BAUDRATE 57600 #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } -#if (BFIN_BOOT_MODE == BF533_SPI_BOOT) -#if (BFIN_CPU == ADSP_BF531) -#define CFG_PROMPT "serial_bf531> " /* Monitor Command Prompt */ -#elif (BFIN_CPU == ADSP_BF532) -#define CFG_PROMPT "serial_bf532> " /* Monitor Command Prompt */ -#else -#define CFG_PROMPT "serial_bf533> " /* Monitor Command Prompt */ -#endif -#else -#if (BFIN_CPU == ADSP_BF531) -#define CFG_PROMPT "bf531> " /* Monitor Command Prompt */ -#elif (BFIN_CPU == ADSP_BF532) -#define CFG_PROMPT "bf532> " /* Monitor Command Prompt */ -#else -#define CFG_PROMPT "bf533> " /* Monitor Command Prompt */ -#endif -#endif +#define CFG_PROMPT "bfin> " /* Monitor Command Prompt */ -#if (CONFIG_COMMANDS & CFG_CMD_KGDB) +#if defined(CONFIG_CMD_KGDB) #define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ #else #define CFG_CBSIZE 256 /* Console I/O Buffer Size */ @@ -395,7 +310,7 @@ /* Enabled below option for CF support */ /* #define CONFIG_STAMP_CF 1 */ -#if defined(CONFIG_STAMP_CF) && (CONFIG_COMMANDS & CFG_CMD_IDE) +#if defined(CONFIG_STAMP_CF) && defined(CONFIG_CMD_IDE) #define CONFIG_MISC_INIT_R 1 #define CONFIG_DOS_PARTITION 1 @@ -443,25 +358,16 @@ /* * FLASH organization and environment definitions */ -#define CFG_BOOTMAPSZ (8 << 20)/* Initial Memory map for Linux */ - -/* 0xFF, 0xBBC3BBc3, 0x99B39983 */ -/*#define AMGCTLVAL (AMBEN_P0 | AMBEN_P1 | AMBEN_P2 | AMCKEN) -#define AMBCTL0VAL (B1WAT_11 | B1RAT_11 | B1HT_3 | B1ST_4 | B1TT_4 | B1RDYPOL | \ - B1RDYEN | B0WAT_11 | B0RAT_11 | B0HT_3 | B0ST_4 | B0TT_4 | B0RDYPOL | B0RDYEN) -#define AMBCTL1VAL (B3WAT_9 | B3RAT_9 | B3HT_2 | B3ST_3 | B3TT_4 | B3RDYPOL | \ - B3RDYEN | B2WAT_9 | B2RAT_9 | B2HT_2 | B2ST_4 | B2TT_4 | B2RDYPOL | B2RDYEN) -*/ -#define AMGCTLVAL 0xFF -#define AMBCTL0VAL 0xBBC3BBC3 -#define AMBCTL1VAL 0x99B39983 -#define CF_AMBCTL1VAL 0x99B3ffc2 - -#ifdef CONFIG_VDSP -#define ET_EXEC_VDSP 0x8 -#define SHT_STRTAB_VDSP 0x1 -#define ELFSHDRSIZE_VDSP 0x2C -#define VDSP_ENTRY_ADDR 0xFFA00000 -#endif + +#define CONFIG_EBIU_SDRRC_VAL 0x268 +#define CONFIG_EBIU_SDGCTL_VAL 0x911109 +#define CONFIG_EBIU_SDBCTL_VAL 0x37 + +#define CONFIG_EBIU_AMGCTL_VAL 0xFF +#define CONFIG_EBIU_AMBCTL0_VAL 0xBBC3BBC3 +#define CONFIG_EBIU_AMBCTL1_VAL 0x99B39983 +#define CF_CONFIG_EBIU_AMBCTL1_VAL 0x99B3ffc2 + +#include #endif