X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fatc.h;h=4ef50c23f0b2ce3fe98722097aa7486c2851d215;hb=cfd60441d8360cb9ffa315ecf3a2aef9bc134905;hp=1fb6ed8f12c5c06828b2618809fd17bfb6f17ec6;hpb=9a0e21a3a87830f66a93c17d1bca66fd12d860ae;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/atc.h b/include/configs/atc.h
index 1fb6ed8..4ef50c2 100644
--- a/include/configs/atc.h
+++ b/include/configs/atc.h
@@ -35,6 +35,7 @@
 
 #define CONFIG_MPC8260		1	/* This is an MPC8260 CPU		*/
 #define CONFIG_ATC		1	/* ...on a ATC board	*/
+#define CONFIG_CPM2		1	/* Has a CPM2 */
 
 /*
  * select serial console configuration
@@ -63,9 +64,7 @@
  * for FCC)
  *
  * if CONFIG_ETHER_NONE is defined, then either the ethernet routines must be
- * defined elsewhere (as for the console), or CFG_CMD_NET must be removed
- * from CONFIG_COMMANDS to remove support for networking.
- *
+ * defined elsewhere (as for the console), or CONFIG_CMD_NET must be unset.
  */
 #undef	CONFIG_ETHER_ON_SCC		/* define if ether on SCC       */
 #undef	CONFIG_ETHER_NONE		/* define if ether on something else */
@@ -105,15 +104,15 @@
 
 #define CONFIG_PREBOOT							\
 	"echo;"								\
-	"echo Type \"run flash_nfs\" to mount root filesystem over NFS;"\
+	"echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;"\
 	"echo"
 
 #undef	CONFIG_BOOTARGS
 #define CONFIG_BOOTCOMMAND						\
 	"bootp;"							\
 	"setenv bootargs root=/dev/nfs rw "				\
-	"nfsroot=$(serverip):$(rootpath) " 				\
-	"ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname)::off;"\
+	"nfsroot=${serverip}:${rootpath} " 				\
+	"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off;"\
 	"bootm"
 
 /*-----------------------------------------------------------------------
@@ -123,27 +122,37 @@
 #define CONFIG_LOADS_ECHO	1	/* echo on for serial download	*/
 #undef	CFG_LOADS_BAUD_CHANGE		/* don't allow baudrate change	*/
 
-#define CONFIG_BOOTP_MASK	(CONFIG_BOOTP_DEFAULT|CONFIG_BOOTP_BOOTFILESIZE)
 
-#define CONFIG_COMMANDS		(CONFIG_CMD_DFL | \
-				 CFG_CMD_EEPROM | \
-				 CFG_CMD_PCI | \
-				 CFG_CMD_PCMCIA | \
-				 CFG_CMD_DATE | \
-				 CFG_CMD_IDE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
 
 
-#define CONFIG_DOS_PARTITION
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_PCMCIA
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_IDE
 
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+
+#define CONFIG_DOS_PARTITION
 
 /*
  * Miscellaneous configurable options
  */
 #define	CFG_LONGHELP			/* undef to save memory		*/
 #define	CFG_PROMPT	"=> "		/* Monitor Command Prompt	*/
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
 #define	CFG_CBSIZE	1024		/* Console I/O Buffer Size	*/
 #else
 #define	CFG_CBSIZE	256		/* Console I/O Buffer Size	*/
@@ -284,7 +293,7 @@
  * Cache Configuration
  */
 #define CFG_CACHELINE_SIZE      32      /* For MPC8260 CPU              */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
 # define CFG_CACHELINE_SHIFT	5	/* log base 2 of the above value */
 #endif
 
@@ -299,7 +308,7 @@
  * HID1 has only read-only information - nothing to set.
  */
 #define CFG_HID0_INIT   (HID0_ICE|HID0_DCE|HID0_ICFI|\
-                         HID0_DCI|HID0_IFEM|HID0_ABE)
+			 HID0_DCI|HID0_IFEM|HID0_ABE)
 #define CFG_HID0_FINAL  (HID0_IFEM|HID0_ABE)
 #define CFG_HID2        0
 
@@ -332,10 +341,10 @@
  */
 #if defined(CONFIG_WATCHDOG)
 #define CFG_SYPCR       (SYPCR_SWTC|SYPCR_BMT|SYPCR_PBME|SYPCR_LBME|\
-                         SYPCR_SWRI|SYPCR_SWP|SYPCR_SWE)
+			 SYPCR_SWRI|SYPCR_SWP|SYPCR_SWE)
 #else
 #define CFG_SYPCR       (SYPCR_SWTC|SYPCR_BMT|SYPCR_PBME|SYPCR_LBME|\
-                         SYPCR_SWRI|SYPCR_SWP)
+			 SYPCR_SWRI|SYPCR_SWP)
 #endif /* CONFIG_WATCHDOG */
 
 /*-----------------------------------------------------------------------
@@ -437,24 +446,24 @@
 /* Bank 0 - FLASH
  */
 #define CFG_BR0_PRELIM  ((CFG_FLASH_BASE & BRx_BA_MSK)  |\
-                         BRx_PS_16                      |\
-                         BRx_MS_GPCM_P                  |\
-                         BRx_V)
+			 BRx_PS_16                      |\
+			 BRx_MS_GPCM_P                  |\
+			 BRx_V)
 
 #define CFG_OR0_PRELIM  (P2SZ_TO_AM(CFG_FLASH_SIZE)     |\
-                         ORxG_CSNT                      |\
-                         ORxG_ACS_DIV1                  |\
-                         ORxG_SCY_3_CLK                 |\
-                         ORxU_EHTR_8IDLE)
+			 ORxG_CSNT                      |\
+			 ORxG_ACS_DIV1                  |\
+			 ORxG_SCY_3_CLK                 |\
+			 ORxU_EHTR_8IDLE)
 
 
 /* Bank 2 - 60x bus SDRAM
  */
 #ifndef CFG_RAMBOOT
 #define CFG_BR2_PRELIM  ((CFG_SDRAM_BASE & BRx_BA_MSK)  |\
-                         BRx_PS_64                      |\
-                         BRx_MS_SDRAM_P                 |\
-                         BRx_V)
+			 BRx_PS_64                      |\
+			 BRx_MS_SDRAM_P                 |\
+			 BRx_V)
 
 #define CFG_OR2_PRELIM	 CFG_OR2_8COL
 
@@ -462,12 +471,12 @@
 #endif /* CFG_RAMBOOT */
 
 #define CFG_BR4_PRELIM  ((RTC_BASE_ADDR & BRx_BA_MSK)   |\
-                         BRx_PS_8                       |\
-                         BRx_MS_UPMA                    |\
-                         BRx_V)
+			 BRx_PS_8                       |\
+			 BRx_MS_UPMA                    |\
+			 BRx_V)
 
 #define CFG_OR4_PRELIM  (ORxU_AM_MSK | ORxU_BI)
-									   
+
 /*-----------------------------------------------------------------------
  * PCMCIA stuff
  *-----------------------------------------------------------------------