X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fapollon.h;h=c93e77a2e22d253c10cf931fdd51c0e345dadb2c;hb=d3c23a790fb24f9cb5cc467b81b0c3ad3eeb1f96;hp=7727bc3e291886613f1fad2605169c50dffe2e40;hpb=2eb6e01049886bdaadf11243e7c8cf674c34ed0b;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/apollon.h b/include/configs/apollon.h
old mode 100755
new mode 100644
index 7727bc3..c93e77a
--- a/include/configs/apollon.h
+++ b/include/configs/apollon.h
@@ -1,5 +1,5 @@
 /*
- * (C) Copyright 2005-2007
+ * (C) Copyright 2005-2008
  * Samsung Electronics,
  * Kyungmin Park <kyungmin.park@samsung.com>
  *
@@ -39,14 +39,14 @@
 
 /* Clock config to target*/
 #define PRCM_CONFIG_I		1
-//#define PRCM_CONFIG_II	1
+/* #define PRCM_CONFIG_II	1 */
 
 /* Boot method */
 /* uncomment if you use NOR boot */
-//#define CFG_NOR_BOOT		1
+/* #define CFG_NOR_BOOT		1 */
 
 /* uncomment if you use NOR on CS3 */
-//#define CFG_USE_NOR		1
+/* #define CFG_USE_NOR		1 */
 
 #ifdef CFG_NOR_BOOT
 #undef CFG_USE_NOR
@@ -103,21 +103,13 @@
  */
 #define	CONFIG_SERIAL1	1	/* UART1 on H4 */
 
- /*
- * I2C configuration
- */
-#define	CONFIG_HARD_I2C
-#define	CFG_I2C_SPEED	100000
-#define	CFG_I2C_SLAVE	1
-#define	CONFIG_DRIVER_OMAP24XX_I2C
-
-/* allow to overwrite serial and ethaddr */ 
+/* allow to overwrite serial and ethaddr */
 #define	CONFIG_ENV_OVERWRITE
 #define	CONFIG_CONS_INDEX	1
 #define	CONFIG_BAUDRATE		115200
 #define	CFG_BAUDRATE_TABLE	{9600, 19200, 38400, 57600, 115200}
 
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ 
+/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
 #include	<config_cmd_default.h>
 
 #define	CONFIG_CMD_DHCP
@@ -158,6 +150,7 @@
 	"norboot=cp32 0x18040000 0x80008000 0x200000; go 0x80008000\0"	\
 	"oneboot=onenand read 0x80008000 0x40000 0x200000; go 0x80008000\0"\
 	"onesyncboot=run syncmode oneboot\0"				\
+	"updateb=tftp 0x80180000 u-boot-onenand.bin; onenand erase 0x0 0x20000; onenand write 0x80180000 0x0 0x20000\0"					\
 	"bootcmd=run uboot\0"
 
 /*
@@ -173,15 +166,15 @@
 #define	CFG_MAXARGS	16	/* max number of command args */
 #define	CFG_BARGSIZE	CFG_CBSIZE	/* Boot Argument Buffer Size */
 
-#define	CFG_MEMTEST_START 	(OMAP2420_SDRC_CS0)	/* memtest works on */
+#define	CFG_MEMTEST_START	(OMAP2420_SDRC_CS0)	/* memtest works on */
 #define	CFG_MEMTEST_END		(OMAP2420_SDRC_CS0+SZ_31M)
 
 #undef	CFG_CLKS_IN_HZ	/* everything, incl board info, in Hz */
 
 #define	CFG_LOAD_ADDR	(OMAP2420_SDRC_CS0)	/* default load address */
 
-/* The 2420 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) 
- * or by 32KHz clk, or from external sig. This rate is divided by a local 
+/* The 2420 has 12 GP timers, they can be driven by the SysClk (12/13/19.2)
+ * or by 32KHz clk, or from external sig. This rate is divided by a local
  * divisor.
  */
 #define	V_PVT	7	/* use with 12MHz/128 */
@@ -193,7 +186,7 @@
 /*-----------------------------------------------------------------------
  * Stack sizes
  *
- * The stack sizes are set up in start.S using the settings below 
+ * The stack sizes are set up in start.S using the settings below
  */
 #define	CONFIG_STACKSIZE SZ_128K	/* regular stack */
 #ifdef	CONFIG_USE_IRQ
@@ -222,8 +215,8 @@
  * CFI FLASH driver setup
  */
 # define	CFG_FLASH_CFI	1	/* Flash memory is CFI compliant */
-# define	CFG_FLASH_CFI_DRIVER	1	/* Use drivers/cfi_flash.c */
-//#define CFG_FLASH_USE_BUFFER_WRITE 1 /* Use buffered writes (~10x faster) */
+# define	CONFIG_FLASH_CFI_DRIVER	1	/* Use drivers/cfi_flash.c */
+/* #define CFG_FLASH_USE_BUFFER_WRITE 1 */ /* Use buffered writes (~10x faster) */
 # define	CFG_FLASH_PROTECTION	1	/* Use h/w sector protection*/
 
 #else	/* !CFG_USE_NOR */