X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fam64x_evm.h;h=b8a25e95f3661e4d81d2a6b1782feee546318abd;hb=6600b355c71e80c99d8edb8603dd5e3df8ed4db8;hp=d7ec31708a3adde155adb504e7e406f4a6a94d8e;hpb=55cf860ba7d604081b11b8ddc23c79572a0ada34;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/am64x_evm.h b/include/configs/am64x_evm.h
index d7ec317..b8a25e9 100644
--- a/include/configs/am64x_evm.h
+++ b/include/configs/am64x_evm.h
@@ -18,17 +18,7 @@
 /* DDR Configuration */
 #define CONFIG_SYS_SDRAM_BASE1		0x880000000
 
-#if defined(CONFIG_TARGET_AM642_A53_EVM)
-#else
-/*
- * Link BSS to be within SPL in a dedicated region located near the top of
- * the MCU SRAM, this way making it available also before relocation. Note
- * that we are not using the actual top of the MCU SRAM as there is a memory
- * location filled in by the boot ROM that we want to read out without any
- * interference from the C context.
- */
-#define CONFIG_SPL_BSS_START_ADDR	(TI_SRAM_SCRATCH_BOARD_EEPROM_START -\
-					 CONFIG_SPL_BSS_MAX_SIZE)
+#if !defined(CONFIG_TARGET_AM642_A53_EVM)
 /* Set the stack right below the SPL BSS section */
 /* Configure R5 SPL post-relocation malloc pool in DDR */
 #define CONFIG_SYS_SPL_MALLOC_START    0x84000000