X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fam64x_evm.h;h=25c71f00a20fdf111bcb6e7f271103a209ebf131;hb=0ea156ba00f34b3b9c8735d25c8ec7b8dffffb45;hp=f1bef40a7cad03f0ff660ebb458b9280a6540c4f;hpb=9b5f9aeb3b48dbc059272168635a397ea5096a31;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/am64x_evm.h b/include/configs/am64x_evm.h
index f1bef40..25c71f0 100644
--- a/include/configs/am64x_evm.h
+++ b/include/configs/am64x_evm.h
@@ -16,26 +16,7 @@
 #include <environment/ti/k3_dfu.h>
 
 /* DDR Configuration */
-#define CONFIG_SYS_SDRAM_BASE1		0x880000000
-
-#if defined(CONFIG_TARGET_AM642_A53_EVM)
-#define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SPL_TEXT_BASE + SZ_4M)
-#else
-/*
- * Link BSS to be within SPL in a dedicated region located near the top of
- * the MCU SRAM, this way making it available also before relocation. Note
- * that we are not using the actual top of the MCU SRAM as there is a memory
- * location filled in by the boot ROM that we want to read out without any
- * interference from the C context.
- */
-#define CONFIG_SPL_BSS_START_ADDR	(TI_SRAM_SCRATCH_BOARD_EEPROM_START -\
-					 CONFIG_SPL_BSS_MAX_SIZE)
-/* Set the stack right below the SPL BSS section */
-#define CONFIG_SYS_INIT_SP_ADDR         CONFIG_SPL_BSS_START_ADDR
-/* Configure R5 SPL post-relocation malloc pool in DDR */
-#define CONFIG_SYS_SPL_MALLOC_START    0x84000000
-#define CONFIG_SYS_SPL_MALLOC_SIZE     SZ_16M
-#endif
+#define CFG_SYS_SDRAM_BASE1		0x880000000
 
 #define PARTS_DEFAULT \
 	/* Linux partitions */ \
@@ -125,6 +106,4 @@
 /* Now for the remaining common defines */
 #include <configs/ti_armv7_common.h>
 
-#define CONFIG_SYS_USB_FAT_BOOT_PARTITION 1
-
 #endif /* __CONFIG_AM642_EVM_H */