X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fam43xx_evm.h;h=8355b4abc0f69bd7658133f0bbd564597f16f5a4;hb=f9a48654ee70fbad29f487d074fd36a1548b4209;hp=743f953602236f9d4d4277375844ac7997aa3830;hpb=f855a7bc12dc3bdf83905b4c72a6d795ee8d8ee5;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h index 743f953..8355b4a 100644 --- a/include/configs/am43xx_evm.h +++ b/include/configs/am43xx_evm.h @@ -1,15 +1,13 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * am43xx_evm.h * * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ - * - * SPDX-License-Identifier: GPL-2.0+ */ #ifndef __CONFIG_AM43XX_EVM_H #define __CONFIG_AM43XX_EVM_H -#define CONFIG_ARCH_CPU_INIT #define CONFIG_MAX_RAM_BANK_SIZE (1024 << 21) /* 2GB */ #define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */ @@ -28,13 +26,14 @@ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* Power */ +#ifndef CONFIG_DM_I2C #define CONFIG_POWER #define CONFIG_POWER_I2C +#endif #define CONFIG_POWER_TPS65218 #define CONFIG_POWER_TPS62362 /* SPL defines. */ -#define CONFIG_SPL_TEXT_BASE CONFIG_ISW_ENTRY_ADDR #define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \ (128 << 20)) @@ -59,11 +58,6 @@ /* Now bring in the rest of the common code. */ #include -/* Always 64 KiB env size */ -#define CONFIG_ENV_SIZE (64 << 10) - -#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG - /* Clock Defines */ #define V_OSCK 24000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK) @@ -77,11 +71,10 @@ #define CONFIG_SYS_USB_FAT_BOOT_PARTITION 1 #define CONFIG_USB_XHCI_OMAP -#define CONFIG_OMAP_USB_PHY #define CONFIG_AM437X_USB2PHY2_HOST #endif -#if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_SPL_USBETH_SUPPORT) +#if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_SPL_USB_ETHER) #undef CONFIG_USB_DWC3_PHY_OMAP #undef CONFIG_USB_DWC3_OMAP #undef CONFIG_USB_DWC3 @@ -115,38 +108,6 @@ #define DFUARGS #endif -#ifdef CONFIG_QSPI_BOOT -#ifndef CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_TEXT_BASE CONFIG_ISW_ENTRY_ADDR -#endif -#define CONFIG_SYS_REDUNDAND_ENVIRONMENT -#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED -#define CONFIG_ENV_SECT_SIZE (64 << 10) /* 64 KB sectors */ -#define CONFIG_ENV_OFFSET 0x110000 -#define CONFIG_ENV_OFFSET_REDUND 0x120000 -#ifdef MTDIDS_DEFAULT -#undef MTDIDS_DEFAULT -#endif -#ifdef MTDPARTS_DEFAULT -#undef MTDPARTS_DEFAULT -#endif -#define MTDPARTS_DEFAULT "mtdparts=qspi.0:512k(QSPI.u-boot)," \ - "512k(QSPI.u-boot.backup)," \ - "512k(QSPI.u-boot-spl-os)," \ - "64k(QSPI.u-boot-env)," \ - "64k(QSPI.u-boot-env.backup)," \ - "8m(QSPI.kernel)," \ - "-(QSPI.file-system)" -#endif - -/* SPI */ -#define CONFIG_TI_SPI_MMAP -#define CONFIG_QSPI_SEL_GPIO 48 -#define CONFIG_SF_DEFAULT_SPEED 48000000 -#define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 -#define CONFIG_QSPI_QUAD_SUPPORT -#define CONFIG_TI_EDMA3 - #ifndef CONFIG_SPL_BUILD #include #include @@ -231,23 +192,15 @@ #ifndef CONFIG_SPL_BUILD /* CPSW Ethernet */ -#define CONFIG_MII -#define CONFIG_BOOTP_DEFAULT -#define CONFIG_BOOTP_DNS -#define CONFIG_BOOTP_DNS2 -#define CONFIG_BOOTP_SEND_HOSTNAME -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_SUBNETMASK #define CONFIG_NET_RETRY_COUNT 10 #endif -#define CONFIG_DRIVER_TI_CPSW #define PHY_ANEG_TIMEOUT 8000 /* PHY needs longer aneg time at 1G */ #define CONFIG_SYS_RX_ETH_BUFFER 64 /* NAND support */ -#ifdef CONFIG_NAND +#ifdef CONFIG_MTD_RAW_NAND /* NAND: device related configs */ #define CONFIG_SYS_NAND_PAGE_SIZE 4096 #define CONFIG_SYS_NAND_OOBSIZE 224 @@ -256,8 +209,6 @@ CONFIG_SYS_NAND_PAGE_SIZE) #define CONFIG_SYS_NAND_5_ADDR_CYCLE /* NAND: driver related configs */ -#define CONFIG_NAND_OMAP_GPMC -#define CONFIG_NAND_OMAP_ELM #define CONFIG_SYS_NAND_ONFI_DETECTION #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH16_CODE_HW #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS @@ -285,30 +236,15 @@ } #define CONFIG_SYS_NAND_ECCSIZE 512 #define CONFIG_SYS_NAND_ECCBYTES 26 -#define MTDIDS_DEFAULT "nand0=nand.0" -#define MTDPARTS_DEFAULT "mtdparts=nand.0:" \ - "256k(NAND.SPL)," \ - "256k(NAND.SPL.backup1)," \ - "256k(NAND.SPL.backup2)," \ - "256k(NAND.SPL.backup3)," \ - "512k(NAND.u-boot-spl-os)," \ - "1m(NAND.u-boot)," \ - "256k(NAND.u-boot-env)," \ - "256k(NAND.u-boot-env.backup1)," \ - "7m(NAND.kernel)," \ - "-(NAND.file-system)" #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x00180000 /* NAND: SPL related configs */ -#ifdef CONFIG_SPL_NAND_SUPPORT -#define CONFIG_SPL_NAND_AM33XX_BCH -#endif /* NAND: SPL falcon mode configs */ #ifdef CONFIG_SPL_OS_BOOT #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00300000 /* kernel offset */ #endif #define NANDARGS \ - "mtdids=" MTDIDS_DEFAULT "\0" \ - "mtdparts=" MTDPARTS_DEFAULT "\0" \ + "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ + "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ "nandargs=setenv bootargs console=${console} " \ "${optargs} " \ "root=${nandroot} " \ @@ -321,10 +257,10 @@ "nand read ${loadaddr} NAND.kernel; " \ "bootz ${loadaddr} - ${fdtaddr}\0" #define NANDBOOT "run nandboot; " -#else /* !CONFIG_NAND */ +#else /* !CONFIG_MTD_RAW_NAND */ #define NANDARGS #define NANDBOOT -#endif /* CONFIG_NAND */ +#endif /* CONFIG_MTD_RAW_NAND */ #if defined(CONFIG_TI_SECURE_DEVICE) /* Avoid relocating onto firewalled area at end of DRAM */