X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fadp-ae3xx.h;h=7dd2dc4eb1c6ab386e6951a1647b58da5603527d;hb=e4d741f8abc4a92426d3a826f99390c3abe02d61;hp=1ebbc4c9e254ae450541650acd99d92b02fe1a22;hpb=095c9f35d5a04ed0907624479f702f6fce7591bb;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/adp-ae3xx.h b/include/configs/adp-ae3xx.h
index 1ebbc4c..7dd2dc4 100644
--- a/include/configs/adp-ae3xx.h
+++ b/include/configs/adp-ae3xx.h
@@ -1,9 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright (C) 2011 Andes Technology Corporation
  * Shawn Lin, Andes Technology Corporation <nobuhiro@andestech.com>
  * Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #ifndef __CONFIG_H
@@ -16,27 +15,12 @@
  */
 #define CONFIG_USE_INTERRUPT
 
-#define CONFIG_SKIP_LOWLEVEL_INIT
-
 #define CONFIG_SKIP_TRUNOFF_WATCHDOG
 
-#define CONFIG_ARCH_MAP_SYSMEM
-
-#define CONFIG_BOOTP_SEND_HOSTNAME
-#define CONFIG_BOOTP_SERVERIP
-
-#ifdef CONFIG_SKIP_LOWLEVEL_INIT
-#ifdef CONFIG_OF_CONTROL
-#undef CONFIG_OF_SEPARATE
-#define CONFIG_OF_EMBED
-#endif
-#endif
-
 /*
  * Timer
  */
-#define CONFIG_SYS_CLK_FREQ	39062500
-#define VERSION_CLOCK		CONFIG_SYS_CLK_FREQ
+#define VERSION_CLOCK		get_board_sys_clk()
 
 /*
  * Use Externel CLOCK or PCLK
@@ -88,7 +72,6 @@
  * Size of malloc() pool
  */
 /* 512kB is suggested, (CONFIG_ENV_SIZE + 128 * 1024) was not enough */
-#define CONFIG_SYS_MALLOC_LEN		(512 << 10)
 
 /*
  * Physical Memory Map
@@ -98,8 +81,6 @@
 #define PHYS_SDRAM_1 \
 	(PHYS_SDRAM_0 + PHYS_SDRAM_0_SIZE)	/* SDRAM Bank #2 */
 
-#define CONFIG_NR_DRAM_BANKS	2		/* we have 2 bank of DRAM */
-
 #define PHYS_SDRAM_0_SIZE	0x20000000	/* 512 MB */
 #define PHYS_SDRAM_1_SIZE	0x20000000	/* 512 MB */
 
@@ -109,16 +90,6 @@
 					GENERATED_GBL_DATA_SIZE)
 
 /*
- * Load address and memory test area should agree with
- * arch/nds32/config.mk. Be careful not to overwrite U-Boot itself.
- */
-#define CONFIG_SYS_LOAD_ADDR		0x300000
-
-/* memtest works on 63 MB in DRAM */
-#define CONFIG_SYS_MEMTEST_START	PHYS_SDRAM_0
-#define CONFIG_SYS_MEMTEST_END		(PHYS_SDRAM_0 + 0x03F00000)
-
-/*
  * Static memory controller configuration
  */
 #define CONFIG_FTSMC020
@@ -171,23 +142,16 @@
  * FLASH and environment organization
  */
 /* use CFI framework */
-#define CONFIG_SYS_FLASH_CFI
-#define CONFIG_FLASH_CFI_DRIVER
 
 #define CONFIG_SYS_FLASH_CFI_WIDTH	FLASH_CFI_16BIT
-#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
 #define CONFIG_SYS_CFI_FLASH_STATUS_POLL
 
 /* support JEDEC */
-#ifdef CONFIG_CFI_FLASH
-#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT	1
-#endif
 
 /* Do not use CONFIG_FLASH_CFI_LEGACY to detect on board flash */
 #define PHYS_FLASH_1			0x88000000	/* BANK 0 */
 #define CONFIG_SYS_FLASH_BASE		PHYS_FLASH_1
 #define CONFIG_SYS_FLASH_BANKS_LIST	{ PHYS_FLASH_1, }
-#define CONFIG_SYS_MONITOR_BASE		PHYS_FLASH_1
 
 #define CONFIG_SYS_FLASH_ERASE_TOUT	120000	/* TO for Flash Erase (ms) */
 #define CONFIG_SYS_FLASH_WRITE_TOUT	500	/* TO for Flash Write (ms) */
@@ -197,9 +161,6 @@
  * There are 4 banks supported for this Controller,
  * but we have only 1 bank connected to flash on board
  */
-#ifndef CONFIG_SYS_MAX_FLASH_BANKS_DETECT
-#define CONFIG_SYS_MAX_FLASH_BANKS	1
-#endif
 #define CONFIG_SYS_FLASH_BANKS_SIZES {0x4000000}
 
 /* max number of sectors on one chip */
@@ -207,21 +168,9 @@
 #define CONFIG_SYS_MAX_FLASH_SECT	512
 
 /* environments */
-#define CONFIG_ENV_SPI_BUS		0
-#define CONFIG_ENV_SPI_CS		0
-#define CONFIG_ENV_SPI_MAX_HZ		50000000
-#define CONFIG_ENV_SPI_MODE		0
-#define CONFIG_ENV_SECT_SIZE		0x1000
-#define CONFIG_ENV_OFFSET		0x140000
-#define CONFIG_ENV_SIZE			8192
-#define CONFIG_ENV_OVERWRITE
 
 
 /* SPI FLASH */
-#define CONFIG_SF_DEFAULT_BUS		0
-#define CONFIG_SF_DEFAULT_CS		0
-#define CONFIG_SF_DEFAULT_SPEED		1000000
-#define CONFIG_SF_DEFAULT_MODE		0
 
 /*
  * For booting Linux, the board info and command line data