X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2FW7OLMG.h;h=9c5bbff9fee4014c3c170fd105fb298b5c0358cc;hb=afbc526336447a7357e9c82852df0377d09a8089;hp=20d693fa478e7a6383ac95d82557704df553c857;hpb=78549bbf44bd2c8d1a0730fb068836071751afaa;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/W7OLMG.h b/include/configs/W7OLMG.h
index 20d693f..9c5bbff 100644
--- a/include/configs/W7OLMG.h
+++ b/include/configs/W7OLMG.h
@@ -161,10 +161,10 @@
 #define CFG_PCI_SUBSYS_DEVICEID 0x0156		/* PCI Device ID: 405GP		*/
 #define CFG_PCI_PTM1LA		0x00000000	/* point to sdram		*/
 #define CFG_PCI_PTM1MS		0x80000001	/* 2GB, enable hard-wired to 1	*/
-#define CFG_PCI_PTM1PCI 	0x00000000      /* Host: use this pci address   */
-#define CFG_PCI_PTM2LA		0x00000000	/* disabled		*/
-#define CFG_PCI_PTM2MS		0x00000000	/* disabled		*/
-#define CFG_PCI_PTM2PCI 	0x00000000      /* Host: use this pci address   */
+#define CFG_PCI_PTM1PCI		0x00000000      /* Host: use this pci address   */
+#define CFG_PCI_PTM2LA		0x00000000	/* disabled			*/
+#define CFG_PCI_PTM2MS		0x00000000	/* disabled			*/
+#define CFG_PCI_PTM2PCI		0x00000000      /* Host: use this pci address   */
 
 /*-----------------------------------------------------------------------
  * Set up values for external bus controller
@@ -256,23 +256,23 @@
 /*-----------------------------------------------------------------------
  * NVRAM organization
  */
-#define CFG_ENV_IS_IN_NVRAM	1		/* use NVRAM for env vars	*/
+#define CONFIG_ENV_IS_IN_NVRAM	1		/* use NVRAM for env vars	*/
 #define CFG_NVRAM_BASE_ADDR	0xfc000000	/* NVRAM base address		*/
 #define CFG_NVRAM_SIZE		(32*1024)	/* NVRAM size			*/
-#define CFG_ENV_SIZE		0x1000		/* Size of Environment vars	*/
-/*define CFG_ENV_ADDR		 \
-	(CFG_NVRAM_BASE_ADDR+CFG_NVRAM_SIZE-CFG_ENV_SIZE) Env  */
-#define CFG_ENV_ADDR		CFG_NVRAM_BASE_ADDR
+#define CONFIG_ENV_SIZE		0x1000		/* Size of Environment vars	*/
+/*define CONFIG_ENV_ADDR		 \
+	(CFG_NVRAM_BASE_ADDR+CFG_NVRAM_SIZE-CONFIG_ENV_SIZE) Env  */
+#define CONFIG_ENV_ADDR		CFG_NVRAM_BASE_ADDR
 
 #else /* Use Boot Flash for environment variables */
 /*-----------------------------------------------------------------------
  * Flash EEPROM for environment
  */
-#define CFG_ENV_IS_IN_FLASH 1
-#define CFG_ENV_OFFSET		0x00040000	/* Offset of Environment Sector */
-#define CFG_ENV_SIZE		0x10000		/* Total Size of env. sector	*/
+#define CONFIG_ENV_IS_IN_FLASH 1
+#define CONFIG_ENV_OFFSET		0x00040000	/* Offset of Environment Sector */
+#define CONFIG_ENV_SIZE		0x10000		/* Total Size of env. sector	*/
 
-#define CFG_ENV_SECT_SIZE	0x10000		/* see README - env sec tot sze */
+#define CONFIG_ENV_SECT_SIZE	0x10000		/* see README - env sec tot sze */
 #endif
 
 /*-----------------------------------------------------------------------
@@ -293,15 +293,6 @@
  */
 #define SPD_EEPROM_ADDRESS      0x50	/* XXX conflicting address!!! XXX */
 
-/*-----------------------------------------------------------------------
- * Cache Configuration
- */
-#define CFG_DCACHE_SIZE		8192		/* For AMCC 405 CPUs			*/
-#define CFG_CACHELINE_SIZE	32		/* ...		*/
-#if defined(CONFIG_CMD_KGDB)
-#define CFG_CACHELINE_SHIFT	5		/* log base 2 of the above val. */
-#endif
-
 /*
  * Init Memory Controller:
  */