X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2FUCP1020.h;h=a0255dcb52be32e0ce9d22332f439ca62a650919;hb=0fd2290cfc3b5c907783772ded82a8dfad4eb0e8;hp=d62c9b3163403e27bdf57a5f7152842d20f76b7e;hpb=c69f6d04ec66433f2360490a5cd0263c83aab18f;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/UCP1020.h b/include/configs/UCP1020.h index d62c9b3..ab69c45 100644 --- a/include/configs/UCP1020.h +++ b/include/configs/UCP1020.h @@ -1,11 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright 2013-2015 Arcturus Networks, Inc. * http://www.arcturusnetworks.com/products/ucp1020/ * based on include/configs/p1_p2_rdb_pc.h * original copyright follows: * Copyright 2009-2011 Freescale Semiconductor, Inc. - * - * SPDX-License-Identifier: GPL-2.0+ */ /* @@ -14,8 +13,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_FSL_ELBC -#define CONFIG_PCI #define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */ #define CONFIG_PCIE2 /* PCIE controller 2 (slot 2) */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ @@ -28,9 +25,7 @@ #define CONFIG_UCP1020_REV_1_3 #define CONFIG_BOARDNAME "uCP1020-64EE512-0U1-XR-T1" -#define CONFIG_P1020 -#define CONFIG_TSEC_ENET #define CONFIG_TSEC1 #define CONFIG_TSEC3 #define CONFIG_HAS_ETH0 @@ -43,19 +38,10 @@ #define CONFIG_NETMASK 255.255.252.0 #define CONFIG_ETHPRIME "eTSEC3" -#ifndef CONFIG_SPI_FLASH -#endif #define CONFIG_SYS_REDUNDAND_ENVIRONMENT -#define CONFIG_MMC #define CONFIG_SYS_L2_SIZE (256 << 10) -#define CONFIG_LAST_STAGE_INIT - -#if !defined(CONFIG_DONGLE) -#define CONFIG_SILENT_CONSOLE -#endif - #endif #if defined(CONFIG_TARGET_UCP1020) @@ -64,9 +50,7 @@ #define CONFIG_UCP1020_REV_1_3 #define CONFIG_BOARDNAME_LOCAL "uCP1020-64EEE512-OU1-XR" -#define CONFIG_P1020 -#define CONFIG_TSEC_ENET #define CONFIG_TSEC1 #define CONFIG_TSEC2 #define CONFIG_TSEC3 @@ -84,22 +68,16 @@ #define CONFIG_NETMASK 255.255.255.0 #define CONFIG_ETHPRIME "eTSEC1" -#ifndef CONFIG_SPI_FLASH -#endif #define CONFIG_SYS_REDUNDAND_ENVIRONMENT -#define CONFIG_MMC #define CONFIG_SYS_L2_SIZE (256 << 10) -#define CONFIG_LAST_STAGE_INIT - #endif #ifdef CONFIG_SDCARD #define CONFIG_RAMBOOT_SDCARD #define CONFIG_SYS_RAMBOOT #define CONFIG_SYS_EXTRA_ENV_RELOC -#define CONFIG_SYS_TEXT_BASE 0x11000000 #define CONFIG_RESET_VECTOR_ADDRESS 0x1107fffc #endif @@ -107,13 +85,9 @@ #define CONFIG_RAMBOOT_SPIFLASH #define CONFIG_SYS_RAMBOOT #define CONFIG_SYS_EXTRA_ENV_RELOC -#define CONFIG_SYS_TEXT_BASE 0x11000000 #define CONFIG_RESET_VECTOR_ADDRESS 0x1107fffc #endif -#ifndef CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_TEXT_BASE 0xeff80000 -#endif #define CONFIG_SYS_TEXT_BASE_NOR 0xeff80000 #ifndef CONFIG_RESET_VECTOR_ADDRESS @@ -124,21 +98,9 @@ #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #endif -/* High Level Configuration Options */ -#define CONFIG_BOOKE -#define CONFIG_E500 -/* #define CONFIG_MPC85xx */ - -#define CONFIG_MP - -#define CONFIG_FSL_LAW - #define CONFIG_ENV_OVERWRITE -#define CONFIG_CMD_SATA -#define CONFIG_SATA_SIL #define CONFIG_SYS_SATA_MAX_DEVICE 2 -#define CONFIG_LIBATA #define CONFIG_LBA48 #define CONFIG_SYS_CLK_FREQ 66666666 @@ -146,40 +108,16 @@ #define CONFIG_HWCONFIG -#define CONFIG_DTT_ADM1021 1 /* ADM1021 temp sensor support */ -#define CONFIG_SYS_DTT_BUS_NUM 1 /* The I2C bus for DTT */ -#define CONFIG_DTT_SENSORS { 0, 1 } /* Sensor index */ -/* - * ADM1021/NCT72 temp sensor configuration (see dtt/adm1021.c for details). - * there will be one entry in this array for each two (dummy) sensors in - * CONFIG_DTT_SENSORS. - * - * For uCP1020 module: - * - only one ADM1021/NCT72 - * - i2c addr 0x41 - * - conversion rate 0x02 = 0.25 conversions/second - * - ALERT output disabled - * - local temp sensor enabled, min set to 0 deg, max set to 85 deg - * - remote temp sensor enabled, min set to 0 deg, max set to 85 deg - */ -#define CONFIG_SYS_DTT_ADM1021 { { CONFIG_SYS_I2C_NCT72_ADDR, \ - 0x02, 0, 1, 0, 85, 1, 0, 85} } - -#define CONFIG_CMD_DTT - /* * These can be toggled for performance analysis, otherwise use default. */ #define CONFIG_L2_CACHE #define CONFIG_BTB -#define CONFIG_BOARD_EARLY_INIT_F /* Call board_pre_init */ - #define CONFIG_ENABLE_36BIT_PHYS #define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x1fffffff -#define CONFIG_PANIC_HANG /* do not reset board on panic */ #define CONFIG_SYS_CCSRBAR 0xffe00000 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR @@ -192,7 +130,6 @@ /* DDR Setup */ #define CONFIG_DDR_ECC_ENABLE -#define CONFIG_SYS_FSL_DDR3 #ifndef CONFIG_DDR_ECC_ENABLE #define CONFIG_SYS_DDR_RAW_TIMING #define CONFIG_DDR_SPD @@ -206,7 +143,6 @@ #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_NUM_DDR_CONTROLLERS 1 #define CONFIG_DIMM_SLOTS_PER_CTLR 1 /* Default settings for DDR3 */ @@ -288,8 +224,6 @@ #define CONFIG_SYS_FLASH_EMPTY_INFO #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE -#define CONFIG_BOARD_EARLY_INIT_R /* call board_early_init_r function */ - #define CONFIG_SYS_INIT_RAM_LOCK #define CONFIG_SYS_INIT_RAM_ADDR 0xffd00000 /* stack in RAM */ /* Initial L1 address */ @@ -325,7 +259,6 @@ * open - index 2 * shorted - index 1 */ -#define CONFIG_CONS_INDEX 1 #undef CONFIG_SERIAL_SOFTWARE_FIFO #define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE 1 @@ -353,7 +286,7 @@ #define CONFIG_SYS_SPD_BUS_NUM 1 /* For rom_loc and flash bank */ #define CONFIG_RTC_DS1337 -#define CONFIG_SYS_RTC_DS1337_NOOSC +#define CONFIG_RTC_DS1337_NOOSC #define CONFIG_SYS_I2C_RTC_ADDR 0x68 #define CONFIG_SYS_I2C_PCA9557_ADDR 0x18 #define CONFIG_SYS_I2C_NCT72_ADDR 0x4C @@ -395,11 +328,7 @@ #define CONFIG_SYS_PCIE1_IO_PHYS 0xffc00000 #define CONFIG_SYS_PCIE1_IO_SIZE 0x00010000 /* 64k */ -#define CONFIG_PCI_PNP /* do pci plug-and-play */ -#define CONFIG_CMD_PCI - #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ -#define CONFIG_DOS_PARTITION #endif /* CONFIG_PCI */ /* @@ -407,7 +336,6 @@ */ #ifdef CONFIG_ENV_FIT_UCBOOT -#define CONFIG_ENV_IS_IN_FLASH #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x20000) #define CONFIG_ENV_SIZE 0x20000 #define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K (one sector) */ @@ -421,7 +349,6 @@ #ifdef CONFIG_RAMBOOT_SPIFLASH -#define CONFIG_ENV_IS_IN_SPI_FLASH #define CONFIG_ENV_SIZE 0x3000 /* 12KB */ #define CONFIG_ENV_OFFSET 0x2000 /* 8KB */ #define CONFIG_ENV_SECT_SIZE 0x1000 @@ -433,18 +360,15 @@ #endif #elif defined(CONFIG_RAMBOOT_SDCARD) -#define CONFIG_ENV_IS_IN_MMC #define CONFIG_FSL_FIXED_MMC_LOCATION #define CONFIG_ENV_SIZE 0x2000 #define CONFIG_SYS_MMC_ENV_DEV 0 #elif defined(CONFIG_SYS_RAMBOOT) -#define CONFIG_ENV_IS_NOWHERE /* Store ENV in memory only */ #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - 0x1000) #define CONFIG_ENV_SIZE 0x2000 #else -#define CONFIG_ENV_IS_IN_FLASH #define CONFIG_ENV_BASE (CONFIG_SYS_FLASH_BASE) #define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K (one sector) */ #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE @@ -463,26 +387,14 @@ #define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */ /* - * Command line configuration. - */ -#define CONFIG_CMD_IRQ -#define CONFIG_CMD_DATE -#define CONFIG_CMD_IRQ -#define CONFIG_CMD_REGINFO -#define CONFIG_CMD_ERRATA -#define CONFIG_CMD_CRAMFS - -/* * USB */ #define CONFIG_HAS_FSL_DR_USB #if defined(CONFIG_HAS_FSL_DR_USB) -#define CONFIG_USB_EHCI - #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 -#ifdef CONFIG_USB_EHCI +#ifdef CONFIG_USB_EHCI_HCD #define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_USB_EHCI_FSL #endif @@ -491,15 +403,8 @@ #undef CONFIG_WATCHDOG /* watchdog disabled */ #ifdef CONFIG_MMC -#define CONFIG_FSL_ESDHC #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR #define CONFIG_MMC_SPI -#define CONFIG_CMD_MMC_SPI -#define CONFIG_GENERIC_MMC -#endif - -#if defined(CONFIG_MMC) || defined(CONFIG_USB_EHCI) || defined(CONFIG_FSL_SATA) -#define CONFIG_DOS_PARTITION #endif /* Misc Extra Settings */ @@ -508,18 +413,7 @@ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_CMDLINE_EDITING /* Command-line editing */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ -#if defined(CONFIG_CMD_KGDB) -#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ -#else -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -#endif -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) - /* Print Buffer Size */ -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE/* Boot Argument Buffer Size */ #define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms tick */ /* @@ -541,10 +435,7 @@ #if defined(CONFIG_TSEC_ENET) -#if defined(CONFIG_UCP1020_REV_1_2) -#define CONFIG_PHY_MICREL_KSZ9021 -#elif defined(CONFIG_UCP1020_REV_1_3) -#define CONFIG_PHY_MICREL_KSZ9031 +#if defined(CONFIG_UCP1020_REV_1_2) || defined(CONFIG_UCP1020_REV_1_3) #else #error "UCP1020 module revision is not defined !!!" #endif @@ -569,11 +460,9 @@ #define TSEC2_PHYIDX 0 #define TSEC3_PHYIDX 0 -#define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */ - #endif -#define CONFIG_HOSTNAME UCP1020 +#define CONFIG_HOSTNAME "UCP1020" #define CONFIG_ROOTPATH "/opt/nfsroot" #define CONFIG_BOOTFILE "uImage" #define CONFIG_UBOOTPATH u-boot.bin /* U-Boot image on TFTP server */ @@ -581,10 +470,6 @@ /* default location for tftp and bootm */ #define CONFIG_LOADADDR 1000000 -#define CONFIG_BOOTARGS /* the boot command will set bootargs */ - -#define CONFIG_BAUDRATE 115200 - #if defined(CONFIG_DONGLE) #define CONFIG_EXTRA_ENV_SETTINGS \