X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2FUCP1020.h;h=92316765973e9f2cf0a175b76a72da561e3205c0;hb=72d81360aabd0485d3832d292bbea29c7c4554ef;hp=68276a15a748e4208f03a894b3617a7f12dac7fe;hpb=c59afcff8a4ef087136e8a0ad7e2c587c32baf51;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/UCP1020.h b/include/configs/UCP1020.h
index 68276a1..9231676 100644
--- a/include/configs/UCP1020.h
+++ b/include/configs/UCP1020.h
@@ -13,6 +13,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#include <linux/stringify.h>
+
 /*** Arcturus FirmWare Environment */
 
 #define MAX_SERIAL_SIZE 15
@@ -30,9 +32,6 @@
 #define FWENV_TYPE	FWENV_NOR_FLASH
 
 #if (FWENV_TYPE == FWENV_MMC)
-#ifndef CONFIG_SYS_MMC_ENV_DEV
-#define CONFIG_SYS_MMC_ENV_DEV 1
-#endif
 #define FWENV_ADDR1 -1
 #define FWENV_ADDR2 -1
 #define FWENV_ADDR3 -1
@@ -146,13 +145,10 @@
 #define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_TEXT_BASE	/* start of monitor */
 #endif
 
-#define CONFIG_ENV_OVERWRITE
-
 #define CONFIG_SYS_SATA_MAX_DEVICE	2
 #define CONFIG_LBA48
 
 #define CONFIG_SYS_CLK_FREQ	66666666
-#define CONFIG_DDR_CLK_FREQ	66666666
 
 #define CONFIG_HWCONFIG
 
@@ -164,9 +160,6 @@
 
 #define CONFIG_ENABLE_36BIT_PHYS
 
-#define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest works on */
-#define CONFIG_SYS_MEMTEST_END		0x1fffffff
-
 #define CONFIG_SYS_CCSRBAR		0xffe00000
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW	CONFIG_SYS_CCSRBAR
 
@@ -177,11 +170,6 @@
 #endif
 
 /* DDR Setup */
-#define CONFIG_DDR_ECC_ENABLE
-#ifndef CONFIG_DDR_ECC_ENABLE
-#define CONFIG_SYS_DDR_RAW_TIMING
-#define CONFIG_DDR_SPD
-#endif
 #define CONFIG_SYS_SPD_BUS_NUM 1
 
 #define CONFIG_SYS_SDRAM_SIZE_LAW	LAW_SIZE_512M
@@ -210,11 +198,7 @@
 #define CONFIG_SYS_DDR_SR_CNTR		0x00000000
 #define CONFIG_SYS_DDR_RCW_1		0x00000000
 #define CONFIG_SYS_DDR_RCW_2		0x00000000
-#ifdef CONFIG_DDR_ECC_ENABLE
 #define CONFIG_SYS_DDR_CONTROL		0xE70C0000	/* Type = DDR3 & ECC */
-#else
-#define CONFIG_SYS_DDR_CONTROL		0xC70C0000	/* Type = DDR3 */
-#endif
 #define CONFIG_SYS_DDR_CONTROL_2	0x04401050
 #define CONFIG_SYS_DDR_TIMING_4		0x00220001
 #define CONFIG_SYS_DDR_TIMING_5		0x03402400
@@ -228,8 +212,6 @@
 #define CONFIG_SYS_DDR_MODE_2		0x8000c000
 #define CONFIG_SYS_DDR_INTERVAL		0x0C300000
 
-#undef CONFIG_CLOCKS_IN_MHZ
-
 /*
  * Memory map
  *
@@ -318,14 +300,6 @@
 #define CONFIG_SYS_NS16550_COM2	(CONFIG_SYS_CCSRBAR + 0x4600)
 
 /* I2C */
-#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
-#define CONFIG_SYS_FSL_I2C_SPEED	400000
-#define CONFIG_SYS_FSL_I2C_SLAVE	0x7F
-#define CONFIG_SYS_FSL_I2C_OFFSET	0x3000
-#define CONFIG_SYS_FSL_I2C2_SPEED	400000
-#define CONFIG_SYS_FSL_I2C2_SLAVE	0x7F
-#define CONFIG_SYS_FSL_I2C2_OFFSET	0x3100
 #define CONFIG_SYS_I2C_NOPROBES		{ {0, 0x29} }
 #define CONFIG_SYS_SPD_BUS_NUM		1 /* For rom_loc and flash bank */
 
@@ -372,7 +346,6 @@
  */
 #if !defined(CONFIG_ENV_FIT_UCBOOT) && defined(CONFIG_RAMBOOT_SDCARD)
 #define CONFIG_FSL_FIXED_MMC_LOCATION
-#define CONFIG_SYS_MMC_ENV_DEV	0
 #endif
 
 #define CONFIG_LOADS_ECHO		/* echo on for serial download */
@@ -457,9 +430,6 @@
 #define CONFIG_BOOTFILE		"uImage"
 #define CONFIG_UBOOTPATH	u-boot.bin /* U-Boot image on TFTP server */
 
-/* default location for tftp and bootm */
-#define CONFIG_LOADADDR		1000000
-
 #if defined(CONFIG_DONGLE)
 
 #define	CONFIG_EXTRA_ENV_SETTINGS					\