X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2FTQM85xx.h;h=d44fb07cc06944a77aec462f8354a2329b4ed8f0;hb=2419169f5749d7af501b3b77a5336d1d535320de;hp=6d205a7a142a400da509378cac4dea301177cbe7;hpb=ba490b7761c62b549c222a9723e532dc801a3899;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/TQM85xx.h b/include/configs/TQM85xx.h index 6d205a7..d44fb07 100644 --- a/include/configs/TQM85xx.h +++ b/include/configs/TQM85xx.h @@ -41,14 +41,21 @@ #define CONFIG_E500 1 /* BOOKE e500 family */ #define CONFIG_MPC85xx 1 /* MPC8540/60/55/41 */ +#if defined(CONFIG_TQM8548_AG) || defined(CONFIG_TQM8548_BE) +#define CONFIG_TQM8548 +#endif + #define CONFIG_PCI +#ifndef CONFIG_TQM8548_AG +#define CONFIG_PCI1 /* PCI/PCI-X controller */ +#endif +#ifdef CONFIG_TQM8548 +#define CONFIG_PCIE1 /* PCI Express interface */ +#endif + #define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */ #define CONFIG_PCIX_CHECK /* PCIX olny works at 66 MHz */ -#ifdef CONFIG_TQM8548 -#define CONFIG_PCI1 -#define CONFIG_PCIE1 #define CONFIG_FSL_PCIE_RESET 1 /* need PCIe reset errata */ -#endif #define CONFIG_TSEC_ENET /* tsec ethernet support */ @@ -70,7 +77,9 @@ * Warning: NAND support will likely increase the U-Boot image size * to more than 256 KB. Please adjust TEXT_BASE if necessary. */ -#undef CONFIG_NAND +#ifdef CONFIG_TQM8548_BE +#define CONFIG_NAND +#endif /* * MPC8540 and MPC8548 don't have CPM module @@ -81,7 +90,9 @@ #define CONFIG_FSL_LAW 1 /* Use common FSL init code */ -#undef CONFIG_CAN_DRIVER /* CAN Driver support */ +#if defined(CONFIG_TQM8548_AG) || defined(CONFIG_TQM8548_BE) +#define CONFIG_CAN_DRIVER /* CAN Driver support */ +#endif /* * sysclk for MPC85xx @@ -135,6 +146,9 @@ */ #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 /* DDR is system memory */ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#ifdef CONFIG_TQM8548_AG +#define CONFIG_VERY_BIG_RAM +#endif #define CONFIG_NUM_DDR_CONTROLLERS 1 #define CONFIG_DIMM_SLOTS_PER_CTLR 1 @@ -152,15 +166,6 @@ #endif /* CONFIG_TQM8541 || CONFIG_TQM8555 || CONFIG_TQM8548 */ /* - * Old TQM85xx boards have 'M' type Spansion Flashes from the S29GLxxxM - * series while new boards have 'N' type Flashes from the S29GLxxxN - * series, which have bigger sectors: 2 x 128 instead of 2 x 64 KB. - */ -#ifdef CONFIG_TQM8548 -#define CONFIG_TQM_FLASH_N_TYPE -#endif /* CONFIG_TQM8548 */ - -/* * Flash on the Local Bus */ #ifdef CONFIG_TQM_BIGFLASH @@ -346,8 +351,6 @@ /* NAND FLASH */ #ifdef CONFIG_NAND -#undef CONFIG_NAND_LEGACY - #define CONFIG_NAND_FSL_UPM 1 #define CONFIG_MTD_NAND_ECC_JFFS2 1 /* use JFFS2 ECC */ @@ -357,36 +360,17 @@ #define CONFIG_SYS_NAND_CS_DIST 0x200 #define CONFIG_SYS_NAND_SIZE 0x8000 -#define CONFIG_SYS_NAND0_BASE (CONFIG_SYS_CCSRBAR + 0x03010000) -#define CONFIG_SYS_NAND1_BASE (CONFIG_SYS_NAND0_BASE + CONFIG_SYS_NAND_CS_DIST) -#define CONFIG_SYS_NAND2_BASE (CONFIG_SYS_NAND1_BASE + CONFIG_SYS_NAND_CS_DIST) -#define CONFIG_SYS_NAND3_BASE (CONFIG_SYS_NAND2_BASE + CONFIG_SYS_NAND_CS_DIST) - -#define CONFIG_SYS_MAX_NAND_DEVICE 2 /* Max number of NAND devices */ -#define NAND_MAX_CHIPS 1 - -#if (CONFIG_SYS_MAX_NAND_DEVICE == 1) -#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND0_BASE } -#elif (CONFIG_SYS_MAX_NAND_DEVICE == 2) -#define CONFIG_SYS_NAND_QUIET_TEST 1 -#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND0_BASE, \ - CONFIG_SYS_NAND1_BASE, \ -} -#elif (CONFIG_SYS_MAX_NAND_DEVICE == 4) -#define CONFIG_SYS_NAND_QUIET_TEST 1 -#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND0_BASE, \ - CONFIG_SYS_NAND1_BASE, \ - CONFIG_SYS_NAND2_BASE, \ - CONFIG_SYS_NAND3_BASE, \ -} -#endif +#define CONFIG_SYS_NAND_BASE (CONFIG_SYS_CCSRBAR + 0x03010000) + +#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ +#define CONFIG_SYS_NAND_MAX_CHIPS 2 /* Number of chips per device */ /* CS3 for NAND Flash */ -#define CONFIG_SYS_BR3_PRELIM ((CONFIG_SYS_NAND0_BASE & BR_BA) | BR_PS_8 | \ - BR_MS_UPMB | BR_V) +#define CONFIG_SYS_BR3_PRELIM ((CONFIG_SYS_NAND_BASE & BR_BA) | \ + BR_PS_8 | BR_MS_UPMB | BR_V) #define CONFIG_SYS_OR3_PRELIM (P2SZ_TO_AM(CONFIG_SYS_NAND_SIZE) | OR_UPM_BI) -#define NAND_BIG_DELAY_US 25 /* max tR for Samsung devices */ +#define NAND_BIG_DELAY_US 25 /* max tR for Samsung devices */ #endif /* CONFIG_NAND */ @@ -552,11 +536,7 @@ */ #define CONFIG_ENV_IS_IN_FLASH 1 -#ifdef CONFIG_TQM_FLASH_N_TYPE #define CONFIG_ENV_SECT_SIZE 0x40000 /* 256K (one sector) for env */ -#else /* !CONFIG_TQM_FLASH_N_TYPE */ -#define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K (one sector) for env */ -#endif /* CONFIG_TQM_FLASH_N_TYPE */ #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE) #define CONFIG_ENV_SIZE 0x2000 #define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR - CONFIG_ENV_SECT_SIZE) @@ -584,14 +564,16 @@ #define CONFIG_JFFS2_NAND 1 -#ifdef CONFIG_JFFS2_CMDLINE +#ifdef CONFIG_CMD_MTDPARTS +#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ +#define CONFIG_FLASH_CFI_MTD #define MTDIDS_DEFAULT "nand0=TQM85xx-nand" #define MTDPARTS_DEFAULT "mtdparts=TQM85xx-nand:-" #else #define CONFIG_JFFS2_DEV "nand0" /* NAND device jffs2 lives on */ #define CONFIG_JFFS2_PART_OFFSET 0 /* start of jffs2 partition */ #define CONFIG_JFFS2_PART_SIZE 0x200000 /* size of jffs2 partition */ -#endif /* CONFIG_JFFS2_CMDLINE */ +#endif /* CONFIG_CMD_MTDPARTS */ #endif /* CONFIG_NAND */ @@ -605,7 +587,9 @@ #define CONFIG_CMD_DHCP #define CONFIG_CMD_NFS #define CONFIG_CMD_SNTP +#ifndef CONFIG_TQM8548_AG #define CONFIG_CMD_DATE +#endif #define CONFIG_CMD_EEPROM #define CONFIG_CMD_DTT #define CONFIG_CMD_MII @@ -683,7 +667,7 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ CONFIG_ENV_BOOTFILE \ CONFIG_ENV_FDT_FILE \ - CONFIG_ENV_CONSDEV \ + CONFIG_ENV_CONSDEV \ "netdev=eth0\0" \ "nfsargs=setenv bootargs root=/dev/nfs rw " \ "nfsroot=$serverip:$rootpath\0" \ @@ -707,12 +691,11 @@ "fdt_addr=ffec0000\0" \ "kernel_addr=ffd00000\0" \ "ramdisk_addr=ff800000\0" \ - CONFIG_ENV_UBOOT \ + CONFIG_ENV_UBOOT \ "load=tftp 100000 $uboot\0" \ "update=protect off $uboot_addr +$filesize;" \ "erase $uboot_addr +$filesize;" \ - "cp.b 100000 $uboot_addr $filesize;" \ - "setenv filesize;saveenv\0" \ + "cp.b 100000 $uboot_addr $filesize" \ "upd=run load update\0" \ "" #define CONFIG_BOOTCOMMAND "run flash_self"