X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2FTQM834x.h;h=c27a04ace996426197c463724abd06c81b21d5e9;hb=93de25308dac01dd1a6ff5891e13ea849041a88a;hp=1cf37ef11b72c328df7895ef144940f73267dd49;hpb=f0306a145b3234ae4bd3b46f2567b6f1ad7b8f4f;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/TQM834x.h b/include/configs/TQM834x.h
index 1cf37ef..c27a04a 100644
--- a/include/configs/TQM834x.h
+++ b/include/configs/TQM834x.h
@@ -15,15 +15,10 @@
  * High Level Configuration Options
  */
 #define CONFIG_E300		1	/* E300 Family */
-#define CONFIG_MPC834x		1	/* MPC834x specific */
-#define CONFIG_MPC8349		1	/* MPC8349 specific */
 
 /* IMMR Base Address Register, use Freescale default: 0xff400000 */
 #define CONFIG_SYS_IMMR		0xff400000
 
-/* System clock. Primary input clock when in PCI host mode */
-#define CONFIG_83XX_CLKIN	66666000	/* 66,666 MHz */
-
 /*
  * Local Bus LCRR
  *    LCRR:  DLL bypass, Clock divider is 8
@@ -58,13 +53,10 @@
 /*
  * FLASH on the Local Bus
  */
-#define CONFIG_SYS_FLASH_CFI		/* use the Common Flash Interface */
-#define CONFIG_FLASH_CFI_DRIVER		/* use the CFI driver */
 #undef CONFIG_SYS_FLASH_CHECKSUM
 #define CONFIG_SYS_FLASH_BASE		0x80000000	/* start of FLASH   */
 #define CONFIG_SYS_FLASH_SIZE		8		/* FLASH size in MB */
 #define CONFIG_SYS_FLASH_EMPTY_INFO	/* print 'E' for empty sectors */
-#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
 
 /*
  * FLASH bank number detection
@@ -181,7 +173,6 @@
 /*
  * TSEC
  */
-#define CONFIG_MII
 
 #define CONFIG_SYS_TSEC1_OFFSET	0x24000
 #define CONFIG_SYS_TSEC1	(CONFIG_SYS_IMMR + CONFIG_SYS_TSEC1_OFFSET)
@@ -269,41 +260,6 @@
 				/* Initial Memory map for Linux */
 #define CONFIG_SYS_BOOTMAPSZ	(256 << 20)
 
-#define CONFIG_SYS_HRCW_LOW (\
-	HRCWL_LCL_BUS_TO_SCB_CLK_1X1 |\
-	HRCWL_DDR_TO_SCB_CLK_1X1 |\
-	HRCWL_CSB_TO_CLKIN_4X1 |\
-	HRCWL_VCO_1X2 |\
-	HRCWL_CORE_TO_CSB_2X1)
-
-#if defined(PCI_64BIT)
-#define CONFIG_SYS_HRCW_HIGH (\
-	HRCWH_PCI_HOST |\
-	HRCWH_64_BIT_PCI |\
-	HRCWH_PCI1_ARBITER_ENABLE |\
-	HRCWH_PCI2_ARBITER_DISABLE |\
-	HRCWH_CORE_ENABLE |\
-	HRCWH_FROM_0X00000100 |\
-	HRCWH_BOOTSEQ_DISABLE |\
-	HRCWH_SW_WATCHDOG_DISABLE |\
-	HRCWH_ROM_LOC_LOCAL_16BIT |\
-	HRCWH_TSEC1M_IN_GMII |\
-	HRCWH_TSEC2M_IN_GMII)
-#else
-#define CONFIG_SYS_HRCW_HIGH (\
-	HRCWH_PCI_HOST |\
-	HRCWH_32_BIT_PCI |\
-	HRCWH_PCI1_ARBITER_ENABLE |\
-	HRCWH_PCI2_ARBITER_DISABLE |\
-	HRCWH_CORE_ENABLE |\
-	HRCWH_FROM_0X00000100 |\
-	HRCWH_BOOTSEQ_DISABLE |\
-	HRCWH_SW_WATCHDOG_DISABLE |\
-	HRCWH_ROM_LOC_LOCAL_16BIT |\
-	HRCWH_TSEC1M_IN_GMII |\
-	HRCWH_TSEC2M_IN_GMII)
-#endif
-
 /* System IO Config */
 #define CONFIG_SYS_SICRH	0
 #define CONFIG_SYS_SICRL	SICRL_LDP_A
@@ -314,8 +270,6 @@
 				 HID0_ENABLE_INSTRUCTION_CACHE)
 #define CONFIG_SYS_HID2	HID2_HBE
 
-#define CONFIG_HIGH_BATS	1	/* High BATs supported */
-
 /* DDR 0 - 512M */
 #define CONFIG_SYS_IBAT0L	(CONFIG_SYS_SDRAM_BASE \
 				| BATL_PP_RW \
@@ -475,7 +429,6 @@
  * JFFS2 partitions
  */
 /* mtdparts command line support */
-#define CONFIG_FLASH_CFI_MTD
 
 /* default mtd partition table */
 #endif	/* __CONFIG_H */