X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2FTQM8272.h;h=be977f1d76ea64946c0c294f4bc1c64b33c34bdd;hb=bb367b95f9204115bd6eac82e839b5590e6da4eb;hp=6c462af53ccafc2b979d82c8bab674c233dc7271;hpb=a694610d3361465d4c8d27dde72ab8b63d31115e;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/TQM8272.h b/include/configs/TQM8272.h index 6c462af..be977f1 100644 --- a/include/configs/TQM8272.h +++ b/include/configs/TQM8272.h @@ -37,6 +37,8 @@ #define CONFIG_MPC8272_FAMILY 1 #define CONFIG_TQM8272 1 +#define CONFIG_SYS_TEXT_BASE 0x40000000 + #define CONFIG_GET_CPU_STR_F 1 /* Get the CPU ID STR */ #define CONFIG_BOARD_GET_CPU_CLK_F 1 /* Get the CLKIN from board fct */ @@ -206,8 +208,8 @@ * - RAM for BD/Buffers is on the 60x Bus (see 28-13) * - Enable Full Duplex in FSMR */ -# define CONFIG_SYS_CMXFCR_MASK (CMXFCR_FC2|CMXFCR_RF2CS_MSK|CMXFCR_TF2CS_MSK) -# define CONFIG_SYS_CMXFCR_VALUE (CMXFCR_RF2CS_CLK13|CMXFCR_TF2CS_CLK14) +# define CONFIG_SYS_CMXFCR_MASK2 (CMXFCR_FC2|CMXFCR_RF2CS_MSK|CMXFCR_TF2CS_MSK) +# define CONFIG_SYS_CMXFCR_VALUE2 (CMXFCR_RF2CS_CLK13|CMXFCR_TF2CS_CLK14) # define CONFIG_SYS_CPMFCR_RAMTYPE 0 # define CONFIG_SYS_FCC_PSMR (FCC_PSMR_FDE|FCC_PSMR_LPB) @@ -219,6 +221,9 @@ * GPIO pins used for bit-banged MII communications */ #define MDIO_PORT 2 /* Port C */ +#define MDIO_DECLARE volatile ioport_t *iop = ioport_addr ( \ + (immap_t *) CONFIG_SYS_IMMR, MDIO_PORT ) +#define MDC_DECLARE MDIO_DECLARE #if STK82xx_150 #define CONFIG_SYS_MDIO_PIN 0x00008000 /* PC16 */ @@ -306,9 +311,6 @@ #if 0 #define CONFIG_CMDLINE_EDITING 1 /* add command line history */ #define CONFIG_SYS_HUSH_PARSER 1 /* Use the HUSH parser */ -#ifdef CONFIG_SYS_HUSH_PARSER -#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " -#endif #endif #if defined(CONFIG_CMD_KGDB) @@ -327,8 +329,6 @@ #define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */ -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } - #define CONFIG_SYS_RESET_ADDRESS 0x40000104 /* "bad" address */ /* @@ -354,7 +354,7 @@ /* What should the base address of the main FLASH be and how big is - * it (in MBytes)? This must contain TEXT_BASE from board/tqm8272/config.mk + * it (in MBytes)? This must contain CONFIG_SYS_TEXT_BASE from board/tqm8272/config.mk * The main FLASH is whichever is connected to *CS0. */ #define CONFIG_SYS_FLASH0_BASE 0x40000000 @@ -439,8 +439,6 @@ WRITE_NAND(d, addr); \ } while(0) -#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ - #endif /* CONFIG_CMD_NAND */ #define CONFIG_PCI @@ -485,9 +483,8 @@ * Definitions for initial stack pointer and data area (in DPRAM) */ #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_IMMR -#define CONFIG_SYS_INIT_RAM_END 0x2000 /* End of used area in DPRAM */ -#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data*/ -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_RAM_SIZE 0x2000 /* Size of used area in DPRAM */ +#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET /*----------------------------------------------------------------------- @@ -497,18 +494,10 @@ */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_FLASH0_BASE -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (192 << 10) /* Reserve 192 kB for Monitor */ #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc()*/ -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH*/ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - /*----------------------------------------------------------------------- * Cache Configuration */